Transistor Layout for Display Frame Area Reduction
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Solution Overview
Problem
Conventional display devices face challenges in minimizing the area occupied by transistors around the display region, as the distance between adjacent transistor electrodes is difficult to reduce, limiting the ability to closely arrange transistors and thereby reduce the overall area of the frame region.
Innovation Solution
The design includes transistors with conductive wiring connecting semiconductor and source/drain electrodes through opening portions, allowing for a clearance between adjacent transistors, which reduces the distance between them and enables more efficient arrangement, thereby minimizing the area of the frame region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If transistors are arranged in the gate length direction to efficiently arrange them, then the gate width can be larger than the gate length, but the distance between adjacent source electrodes or drain electrodes cannot be reduced, preventing close arrangement
Solution Approach 1:
The patent changes the arrangement direction of transistors from the gate length direction to the gate width direction. This dimensional change in arrangement strategy allows the source electrodes and drain electrodes of adjacent transistors to overlap in the gate length direction, thereby reducing the distance between them in the gate width direction and enabling closer packing of transistors in the frame region.
2Area of stationary object
If the distance between adjacent source electrodes or drain electrodes is reduced, then transistors can be closely arranged, but short circuits may occur between adjacent electrodes
Solution Approach 1:
The patent utilizes spatial separation in the gate length direction by arranging transistors such that their source/drain electrodes overlap when viewed along the gate width direction. This dimensional arrangement maintains sufficient physical separation between adjacent electrodes to prevent short circuits while achieving minimal distance between them, thus enabling close packing without compromising reliability.
Solution Approach 2:
The gate insulating film serves as an intermediary layer between adjacent source electrodes and drain electrodes. This insulating film provides electrical isolation between the electrodes, allowing them to be positioned close to each other without risk of short circuit, thereby enabling dense transistor arrangement while maintaining reliability.
Data Source
AI summary
To reduce the area of a portion where a plurality of transistors are provided in a region around a display region and to reduce the area of the region around the display region, a display device includes a first transistor and a second transistor each as a transistor, and the transistor includes a connection wiring that electrically connects a semiconductor film and a source-drain electrode to each other via an opening portion provided in an insulating film. The first transistor and the second transistor are adjacent to each other, and there is a clearance between an end portion, on the side of the second transistor, of the connection wiring in the first transistor and an end portion, on the side of the second transistor, of the opening portion in the first transistor.