Semiconductor Transistor Layout for Low Contact Resistance and Leak Control
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Solution Overview
Problem
Current semiconductor devices face challenges in improving electrical characteristics, particularly in reducing contact resistance and preventing breakdown voltage deterioration due to the proximity of silicide layers to gate insulating films, which leads to increased leak currents.
Innovation Solution
The semiconductor device design features a configuration where the first transistor has a larger distance between its silicide layer and gate insulating film compared to the second transistor, with an additional insulating film separating the silicide layer from the gate insulating film, thereby reducing contact resistance and preventing leak paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the silicide layer is placed close to the gate insulating film to reduce contact resistance, then contact resistance is reduced, but leak current increases and breakdown voltage deteriorates
Solution Approach 1:
An insulating film is introduced as an intermediary layer between the silicide layer and the gate insulating film. This intermediate insulating film allows the silicide layer to remain close to the gate insulating film for low contact resistance while preventing direct contact that would cause leak current and breakdown voltage deterioration.
Solution Approach 2:
The space between the silicide layer and gate insulating film is segmented by introducing an additional insulating film layer. This segmentation separates the conductive silicide layer from the gate insulating film, preventing harmful electrical interaction while maintaining spatial proximity for low resistance.
2Reliability
If the silicide layer is placed close to the gate insulating film to reduce contact resistance, then contact resistance is reduced, but breakdown voltage deteriorates
Solution Approach 1:
The insulating film serves as a protective intermediary that electrically isolates the silicide layer from the gate insulating film. This prevents breakdown voltage deterioration caused by direct contact while allowing the layers to remain in close proximity for low contact resistance.
Solution Approach 2:
The insulating film is placed beforehand between the silicide layer and gate insulating film to provide protective cushioning against electrical breakdown. This pre-established barrier prevents harmful effects before they can occur during device operation.
3Reliability
If different transistors have different silicide-to-gate insulating film distances, then electrical characteristics are optimized for high potential difference applications, but device complexity increases
Solution Approach 1:
Different transistors are designed with different silicide layer configurations - some with insulating films for high potential difference applications, others without for standard applications. This local differentiation optimizes electrical characteristics for specific functional requirements while avoiding unnecessary complexity in all devices.
Solution Approach 2:
The transistor structures are made asymmetric by selectively adding insulating films between silicide layers and gate insulating films based on specific device requirements. This asymmetric design allows optimization for high potential difference applications where needed while maintaining simpler structures elsewhere.
Data Source
AI summary
A semiconductor device is provided with a substrate, a first transistor, and a second transistor. The first transistor has a first diffusion layer region, a second diffusion layer region, a first gate insulating film, a first gate electrode, and a first silicide layer. The first silicide layer is provided on the first diffusion layer region and the second diffusion layer region. The second transistor has a third diffusion layer region, a fourth diffusion layer region, a second gate insulating film, a second gate electrode, and a second silicide layer. The second silicide layer is provided on the third diffusion layer region and the fourth diffusion layer region. A distance between the first silicide layer and the first gate insulating film is larger than a distance between the second silicide layer and the second gate insulating film.