Semiconductor Transistor Low Injection Region Avalanche Resistance

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Solution Overview

Problem

Conventional semiconductor devices, such as IGBTs, face challenges in enhancing the withstand capability of transistor portions due to limitations in carrier injection density and avalanche breakdown resistance.

Innovation Solution

The semiconductor device incorporates a first low injection region with a lower carrier injection density than the collector region, strategically positioned between the transistor and diode portions, and includes a gate trench portion to optimize carrier diffusion and reduce electric field concentration, thereby improving the transistor's withstand capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the collector region is provided with high carrier injection density to improve transistor conductivity, then the transistor's on-state performance is improved, but the withstand capability against avalanche breakdown deteriorates

Engineering Contradiction:
Improvewithstand capabilityVSAvoidavalanche breakdown risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating distinct regions with different carrier injection densities within the transistor structure. Specifically, a low-injection region is formed in the drift region beneath the emitter, while the collector region maintains high injection density. This spatial differentiation allows the low-injection region to suppress avalanche multiplication and improve withstand capability, while the high-injection collector region maintains good on-state conductivity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the drift region into functionally distinct zones: a low-injection region directly beneath the emitter and a high-injection collector region. This segmentation allows each region to perform its specific function - the low-injection region acts as an avalanche suppression zone, while the collector region provides efficient carrier collection, thereby resolving the contradiction between withstand capability and conductivity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the carrier injection density is increased to improve current flow, then the transistor conductivity is enhanced, but the electric field concentration increases leading to breakdown

Engineering Contradiction:
Improvebreakdown resistanceVSAvoidelectric field tolerance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent changes the carrier injection density parameter spatially within the device structure. By creating a low-injection region with reduced carrier concentration beneath the emitter, the electric field distribution is modified to reduce peak field strength and suppress avalanche multiplication, thereby improving breakdown resistance while the collector region maintains high injection for good conductivity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the semiconductor device's ability to withstand high carrier avalanches, reducing the risk of breakdown and improving operational reliability by controlling carrier injection and diffusion.

Implementation Method 1

a first low injection region that is provided on a bottom surface side of the semiconductor substrate farther inward than the respective ends, and has a density of carrier injection from the bottom surface side to a top surface side of the semiconductor substrate that is lower than that of the collector region

Methodology Applied
Scientific EffectCarrier diffusion: Diffusion

Implementation Method 2

includes a gate trench portion to optimize carrier diffusion and reduce electric field concentration

Methodology Applied
Scientific EffectElectric field concentration reduction: Electric Field

Implementation Method 3

enhances the semiconductor device's ability to withstand high carrier avalanches, reducing the risk of breakdown

Methodology Applied
Scientific EffectAvalanche breakdown resistance: Avalanche Breakdown

Data Source

PatentUS10985158B2Semiconductor device with transistor portion having low injection region on the bottom of a substrate
Publication Date: 2021.04.20 FUJI ELECTRIC CO LTD
  • US10985158B2 patent drawing
  • US10985158B2 patent drawing
  • US10985158B2 patent drawing

AI summary

To improve the withstand capability of a transistor portion, provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; and a diode portion provided in the semiconductor substrate and arranged adjacent to the transistor portion in a predetermined arrangement direction. The transistor portion includes a collector region provided in a bottom surface of the semiconductor substrate, at respective ends adjacent to the diode portion; and a first low injection region that is provided on a bottom surface side of the semiconductor substrate farther inward than the respective ends, and has a carrier injection density from the bottom surface side to a top surface side of the semiconductor substrate that is lower than that of the collector region.