Transistor Panel Barrier Layer for Impurity Protection
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Solution Overview
Problem
Transistor panels face reliability issues due to impurities like hydrogen and moisture affecting carrier mobility in semiconductor layers, leading to reduced performance and stability.
Innovation Solution
A transistor panel design with a barrier layer and insulation structure that prevents impurity permeation, using a metal oxide semiconductor with a channel region and source/drain regions made of the same metal, and an additional barrier layer to block hydrogen and moisture, without increasing the number of photomasks or adding a deposition process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional transistor structure is used, then the manufacturing process is simple, but impurities like hydrogen and moisture permeate into the semiconductor layer, reducing carrier mobility and reliability
Solution Approach 1:
The transistor structure is segmented into distinct functional regions: a channel region including oxide semiconductor, source regions, drain regions, and a barrier layer. This segmentation allows each region to be optimized independently - the channel region maintains high carrier mobility through oxide semiconductor, while the barrier layer specifically addresses impurity permeation, thus improving reliability without excessive complexity
Solution Approach 2:
A barrier layer is introduced as an intermediary component between the semiconductor layer and the environment. This barrier layer acts as a mediator that prevents impurities (hydrogen and moisture) from permeating into the semiconductor layer, thereby protecting the channel region and maintaining carrier mobility without requiring fundamental changes to the transistor architecture
2Reliability
If additional barrier layers and insulation structures are added to prevent impurity permeation, then carrier mobility and reliability improve, but manufacturing complexity increases
Solution Approach 1:
The barrier layer is merged with the existing transistor fabrication process by forming it simultaneously with the source and drain regions through a single metal layer structure. The metal layer is patterned to create both the barrier layer portions and the source/drain regions in one manufacturing step, avoiding the need for additional separate deposition or patterning processes
Solution Approach 2:
The metal layer serves multiple functions: it forms the barrier layer to prevent impurity permeation, creates the source and drain regions, and establishes electrical connections. This multi-functionality reduces the number of manufacturing steps required, as one layer and one patterning process accomplish what would traditionally require multiple separate operations
3Reliability
If the channel region is made of oxide semiconductor, then carrier mobility increases, but the structure becomes more complex compared to conventional semiconductors
Solution Approach 1:
The oxide semiconductor is applied locally only to the channel region where high carrier mobility is critical for transistor performance. The source and drain regions use conventional semiconductor materials, creating a hybrid structure that optimizes carrier mobility where needed while maintaining manufacturing simplicity in other areas. This localized application of oxide semiconductor balances performance improvement with manufacturing feasibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances carrier mobility and reliability by preventing impurity ingress, maintaining semiconductor characteristics and reducing manufacturing complexity and costs.
Implementation Method 1
a barrier layer including a first portion disposed between the interlayer insulation layer and each of the source and drain regions, wherein the first portion of the barrier layer contacts each of the source and drain regions
Implementation Method 2
The semiconductor layer may include various elements that have good carrier mobility (e.g., electron mobility)
Data Source
AI summary
A transistor panel includes a channel region including an oxide of a first metal, a source region and a drain region, each including the first metal, wherein the channel region is disposed between the source and drain regions, and wherein the channel region is connected to the source and drain regions, an insulation layer disposed on the channel region, an upper electrode disposed on the insulation layer, an interlayer insulation layer disposed on the upper electrode, the source region and the drain region, and a barrier layer including a first portion disposed between the interlayer insulation layer and each of the source and drain regions, wherein the first portion of the barrier layer contacts each of the source and drain regions. The upper electrode and the barrier layer each comprise a second metal.