Nanometer Transistor Phonon Confinement Barrier Shell

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Solution Overview

Problem

Aggressive downsizing of transistors reduces carrier mobility and thermal performance due to physical limitations, and existing strain engineering techniques increase complexity and expense while compromising thermal efficiency.

Innovation Solution

A nanometer-scale transistor architecture where a portion of the channel is surrounded by an acoustically hard material forming a barrier shell to confine phonons, enhancing carrier mobility without strain engineering and maintaining thermal performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If strain engineering is applied to improve carrier mobility, then carrier mobility increases, but thermal performance deteriorates

Engineering Contradiction:
Improvecarrier mobilityVSAvoidthermal performance
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The patent introduces phonon confinement as an intermediary mechanism to decouple the relationship between carrier mobility enhancement and thermal conduction. By confining phonons in the channel region through acoustically mismatched barrier layers, the patent reduces phonon scattering of carriers (improving mobility) while maintaining efficient heat transfer through the barrier layers (preserving thermal performance), thus resolving the contradiction between speed and temperature parameters

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of the system by introducing acoustically hard barrier layers with specific acoustic impedance mismatches. This creates phonon confinement that selectively affects carrier transport properties without proportionally affecting thermal conduction, thereby improving carrier mobility while maintaining acceptable thermal performance in nanometer-scale transistors

Inventive Principle:
Principle #35Parameter changes

2Length of moving object

If transistor size is reduced aggressively, then device miniaturization is achieved, but carrier mobility decreases

Engineering Contradiction:
Improvetransistor sizeVSAvoidcarrier mobility
Core Design Contradiction:
Length of moving objectVSSpeed

Solution Approach 1:

The patent applies local quality by introducing acoustically hard barrier layers specifically at the channel boundaries rather than uniformly throughout the structure. This localized modification creates phonon confinement exactly where needed (at the interfaces) to reduce carrier scattering, thereby maintaining high carrier mobility even in aggressively scaled nanometer-channel-length devices

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material structures by combining the semiconductor channel material with acoustically hard barrier layer materials. This composite structure creates acoustic impedance mismatches that confine phonons to the channel region, reducing phonon-mediated carrier scattering and maintaining high carrier mobility in miniaturized transistors

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Significantly improves carrier mobility by reducing atomic vibrations and heat transfer efficiency, allowing for faster operation and current handling in small-scale transistors.

Implementation Method 1

The barrier shell functions to confine phonons in the channel. Confining the phonons in the channel reduces the extent to which atoms in the crystal lattice structure of the channel move as they vibrate.

Methodology Applied
Scientific EffectPhonon confinement: Physical Containment

Implementation Method 2

a portion of a channel of a transistor is substantially surrounded with an acoustically hard material to form a barrier shell about the channel

Methodology Applied
Scientific EffectAcoustic impedance mismatch: Acoustics

Data Source

PatentUS8097922B1Nanometer-scale transistor architecture providing enhanced carrier mobility
Publication Date: 2012.01.17 RGT UNIV OF CALIFORNIA
  • US8097922B1 patent drawing
  • US8097922B1 patent drawing
  • US8097922B1 patent drawing

AI summary

The present invention provides a nanometer-scale transistor architecture providing enhanced carrier mobility. In particular, a portion of a channel of a transistor is substantially surrounded with an acoustically hard material to form a barrier shell about the channel. The barrier shell functions to confine phonons in the channel. Confining the phonons in the channel reduces the extent to which atoms in the crystal lattice structure of the channel move as they vibrate. Restricting the extent that the atoms vibrate in the crystal lattice of the channel significantly reduces the scattering of electrons or holes traveling through the channel. In one embodiment of the invention, the thickness of the channel is in the order of the thermal phonon wavelength of the material forming the channel, and the barrier shell is acoustically harder than the channel. The benefits of the present invention may be provided without requiring strain engineering.