Vertical Transistor Recess Layout for Uniform Backside Etching

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Solution Overview

Problem

Existing semiconductor devices face challenges in accurately forming recesses on the second surface of a vertical transistor due to coinciding etching directions of element patterns on the first and second surfaces, leading to etching unevenness and difficulty in achieving designed recess shapes.

Innovation Solution

The semiconductor device employs anisotropic etching using TMAH to form recesses on the second surface with a direction mismatched from the first surface patterns, ensuring accurate formation by setting the recess sides at a rotated angle, such as 45 degrees, to overcome etching unevenness and achieve desired shapes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the extending direction of the recess side coincides with the element pattern side on the first surface, then the etching process is simplified, but the recess cannot be formed as designed due to etching unevenness

Engineering Contradiction:
Improveetching process simplicityVSAvoidrecess formation accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by intentionally setting the extending direction of the recess side at a rotated angle (e.g., 45 degrees) relative to the element pattern side on the first surface. This asymmetric orientation prevents the etching solution from flowing along the same direction as the element patterns, thereby eliminating etching unevenness and enabling precise recess formation while maintaining process simplicity.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the semiconductor substrate is thinned by polishing from the second surface side, then the on-resistance of the power transistor is reduced, but the substrate strength is compromised

Engineering Contradiction:
Improvepower transistor on-resistanceVSAvoidsubstrate strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies segmentation by forming multiple recesses in the second surface of the semiconductor substrate instead of uniformly thinning the entire substrate. These recesses are strategically positioned to reduce on-resistance in critical areas while leaving other regions with sufficient thickness to maintain substrate strength and mechanical integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating recesses with specific orientations and dimensions in localized regions of the second surface. The recess sides are formed with extending directions rotated relative to the element patterns, providing locally optimized electrical characteristics without compromising the overall substrate strength.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If the recess is formed with the side extending direction matching the element pattern, then the mask alignment is simplified, but the etching uniformity deteriorates

Engineering Contradiction:
Improvemask alignment simplicityVSAvoidetching uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent resolves this contradiction by introducing asymmetry in the recess orientation. The recess sides are deliberately formed at a rotated angle (e.g., 45 degrees) relative to the element pattern direction, which prevents the etching solution from following the same flow path as the element patterns. This asymmetric configuration maintains acceptable mask alignment while achieving uniform etching throughout the recess regions.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the formation accuracy of recess patterns, reduces substrate thickness for lower resistance, and maintains substrate strength, thereby improving the performance and reliability of power transistors.

Implementation Method 1

etching the exposed semiconductor substrate at the openings by wet etching with TMAH (Tetramethylammonium hydroxide)

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS20250318222A1Semiconductor device and method of manufacturing the same
Publication Date: 2025.10.09 RENESAS ELECTRONICS CORP
  • US20250318222A1 patent drawing
  • US20250318222A1 patent drawing
  • US20250318222A1 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate having a first surface where a source terminal and a gate electrode of a vertical transistor are formed, and a second surface where a drain terminal of the vertical transistor is formed; a bonding region formed on an upper surface of a region where the source terminal is formed on the first surface side, to which a bonding wire for supplying current to the source terminal is connected; and a plurality of recesses formed in a region on the second surface, at least including the region facing the first surface where the bonding region is formed. An extending direction of an outer peripheral side of an opening of the plurality of recesses is set in a direction mismatched with an extending direction of a side of an element pattern formed on the first surface.