Transistor Silicon Cap Layer Prevents Substrate Corrosion
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Solution Overview
Problem
In semiconductor manufacturing, the use of SiGe layers to enhance electron mobility in PMOS transistors leads to corrosion of the NMOS substrate surface, causing short channel effects and drain induced barrier lowering, which affect transistor performance.
Innovation Solution
A method involving the formation of a silicon cap layer on both NMOS and PMOS transistors after epitaxial growth, which levels up the baseline of the source/drain region, preventing short channel effects and maintaining the p/n junction depth, and using an epitaxial layer as a spacer for NMOS.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon nitride mask layer is used to prevent SiGe deposition on NMOS, then electron mobility in PMOS is improved, but the substrate surface is corroded and the baseline is lowered
Solution Approach 1:
An epitaxial layer is introduced as an intermediary material between the silicon nitride mask and the substrate. This epitaxial layer serves as a sacrificial spacer that prevents direct contact between the mask and substrate, thereby preventing corrosion and maintaining baseline level while still allowing the mask to fulfill its function of preventing SiGe deposition on NMOS.
Solution Approach 2:
The epitaxial layer is formed in advance before the silicon nitride mask is removed. This preliminary action ensures that the baseline is already restored to the correct level before subsequent processing steps, preventing the baseline lowering problem from occurring in the first place.
2Reliability
If the baseline is lowered due to mask removal, then the p/n junction becomes deeper, but short channel effect and DIBL occur
Solution Approach 1:
The epitaxial layer acts as a mediator that maintains the correct baseline level, ensuring that the p/n junction forms at the intended depth. This prevents both short channel effect and DIBL by maintaining proper junction depth control.
3Reliability
If SiGe layer is deposited to enhance electron mobility, then PMOS performance is improved, but NMOS substrate surface is corroded
Solution Approach 1:
The epitaxial layer serves as a protective intermediary between the silicon nitride mask and the NMOS substrate. It prevents the mask removal process from corroding the substrate while allowing the SiGe deposition process to proceed uninterrupted on the PMOS region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents short channel effects and drain induced barrier lowering, maintaining the p/n junction depth and enhancing transistor performance by ensuring consistent baseline levels and improved mobility.
Implementation Method 1
an epitaxial layer is formed in the substrate at two sides of the first gate
Implementation Method 2
a silicon cap layer is formed to cover the epitaxial layer, and the surface of the substrate at two sides of the second gate
Data Source
AI summary
A transistor structure is provided in the present invention. The transistor structure includes: a substrate comprising a N-type well, a gate disposed on the N-type well, a spacer disposed on the gate, a first lightly doped region in the substrate below the spacer, a P-type source/drain region disposed in the substrate at two sides of the gate, a silicon cap layer covering the P-type source/drain region and the first lightly doped region and a silicide layer disposed on the silicon cap layer, and covering only a portion of the silicon cap layer.