Transistor Slew Rate Analysis via Curve-Fitting Model
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Solution Overview
Problem
The slew rate of array transistors in DRAM circuits is not pulled fast enough, leading to slowed performance in digital electronics due to the influence on signal amplification and switch speed.
Innovation Solution
A device and method that includes a tester circuit, measure device, and processor to test transistors, perform curve-fitting on waveforms, generate transistor models, simulate and regulate parameters to create new models, and extract slew rate data, improving slew rate efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional transistor design is used, then device complexity is low, but slew rate is insufficient leading to slow circuit performance
Solution Approach 1:
The patent applies preliminary action by performing curve-fitting and model generation before actual transistor optimization. The system pre-establishes a transistor model with fitted parameters from measured waveforms, allowing slew rate optimization to be achieved through parameter adjustment rather than physical redesign, thus improving speed while managing complexity.
Solution Approach 2:
The patent replaces physical transistor modification with computational modeling and simulation. Instead of mechanically or physically altering the transistor to improve slew rate, the system uses software-based curve-fitting, model generation, and parameter simulation to achieve the same effect, substituting mechanical/physical systems with information processing systems.
2Measurement precision
If transistor parameters are optimized to improve slew rate, then circuit performance improves, but measurement and analysis difficulty increases
Solution Approach 1:
The patent introduces an intermediary fitting function as a mediator between the measured waveform and the transistor parameters. The curve-fitting process acts as an intermediary that translates complex waveform data into meaningful transistor model parameters, making the measurement and analysis process more manageable and accurate without directly confronting the complexity of raw waveform analysis.
Solution Approach 2:
The patent creates a simplified copy of the transistor's electrical behavior through modeling. Instead of directly analyzing the complex physical transistor and its waveforms, the system generates a mathematical model that copies the essential characteristics, allowing for easier and more precise measurement of parameters like slew rate through simulation rather than direct physical measurement.
3Productivity
If more transistor parameters are regulated to improve slew rate, then productivity increases, but device complexity increases
Solution Approach 1:
The patent applies universality by creating a multi-functional transistor model that can simultaneously optimize multiple parameters including slew rate, threshold voltage, and other electrical characteristics. The single model structure serves multiple optimization goals, allowing productivity improvement through comprehensive parameter regulation without proportionally increasing system complexity.
Data Source
AI summary
A device of analyzing at least one transistor includes a tester circuit, a measure device and a processor. The tester circuit is electrically connected to the transistor, the measure device is electrically connected to the transistor, and the processor is electrically connected to the measure device. The tester circuit is configured to test the transistor. The measure device is configured to receive a waveform from the transistor. The processor is configured to perform a curve-fitting on the waveform to get a transistor characteristic curve, to model the transistor characteristic curve to generate a transistor model, to simulate and regulate one or more parameters of the transistor model to create a new transistor model, and to extract slew rate data from the new transistor model.