Transistor Arrangement Spacer for Conduct-on-Fail
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Solution Overview
Problem
Existing power-electronic systems, particularly those using IGBTs, face challenges in achieving reliable electrical conductivity after a thermal fault without compromising the service life of transistor chips during normal operation, and current solutions involve complex mechanisms or additional components that increase costs and reduce reliability.
Innovation Solution
A transistor arrangement with a spacer made of a material that softens under heat, allowing for pressure application only during thermal faults, enabling permanent electrical conductivity through material diffusion and eliminating the need for complex solutions or additional housing, while maintaining chip integrity during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pressure is applied to the transistor chip during normal operation, then electrical contact is improved, but the service life of the transistor chip is reduced
Solution Approach 1:
The spacer transitions from a rigid state during normal operation to a softened state during thermal faults, dynamically adjusting the pressure applied to the transistor chip. This allows the system to adapt its mechanical properties based on operational conditions, applying pressure only when needed for fault recovery rather than continuously.
Solution Approach 2:
The physical state of the spacer changes from solid to softened under thermal influence, altering its mechanical properties. This parameter change enables the spacer to transition between providing structural support and allowing carrier compression, thereby controlling pressure application to the transistor chip based on thermal conditions.
2Reliability
If complex mechanisms or additional housing are used to achieve conduct-on-fail functionality, then reliability after thermal fault is improved, but device complexity and costs increase
Solution Approach 1:
The spacer integrates multiple functions: it provides mechanical support during normal operation, acts as a thermal response element, and enables fault recovery mechanisms. By combining these functions into a single component, the invention eliminates the need for separate mechanisms and additional housing, reducing overall device complexity while maintaining conduct-on-fail functionality.
Solution Approach 2:
The spacer automatically responds to thermal faults through its heat-responsive material properties, enabling the system to self-regulate and recover from faults without external control or additional active components. The material's inherent softening characteristic provides automatic fault detection and recovery activation.
3Object-affected harmful factors
If additional housing is provided for IGBT modules to prevent collateral damage, then safety during thermal fault is improved, but device complexity and costs increase
Solution Approach 1:
The invention extracts the protective function from a separate housing structure and integrates it into the spacer component itself. The spacer's heat-responsive material properties provide inherent protection during thermal faults, eliminating the need for additional protective housing while maintaining safety against collateral damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures reliable, permanent electrical conductivity after a thermal fault without affecting normal operation, reduces component complexity and costs, and enhances the reliability of the transistor arrangement, allowing for scalable and efficient power conversion.
Implementation Method 1
the at least one spacer consists at least partially of a material that softens under the influence of heat, in particular at a temperature occurring in the region of the spacer in the event of a thermal fault in the transistor arrangement
Implementation Method 2
the transistor chip breaks down, it becomes permanently conductive due to the diffusion of a material, for example copper, into the transistor chip
Data Source
Figure 1~2
Figure 3~4
AI summary
The invention relates to a transistor arrangement (3) for a clamping assembly (1), comprising a first carrier (8) on which at least one transistor chip (5) is arranged, and a second carrier (9) which is held at a predetermined distance to the first carrier (8) by at least one spacer (6) during normal operation of the transistor arrangement (3), wherein the spacer (6) and the transistor chip (5) are arranged between the two carriers (8, 9), wherein the at least one spacer (6) consists at least partially of a material that softens under the influence of heat and is arranged in a plane of the first carrier (8) next to the transistor chip (5), whereby the transistor chip (5) is pressure-free when pressure is applied to the carriers (8, 9) in order to provide so-called conduct-on-fail functionality, a reliable permanent electrical conductivity after a thermal failure.to achieve this for a transistor chip without impairing the lifespan of the transistor chip under normal operating conditions prior to the fault occurring.