Low-Dimensional Transistor Spacers for Electrostatic Doping Control
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Solution Overview
Problem
Traditional doping techniques for transistors with low-dimensional semiconductor materials as channel materials face challenges such as non-uniform doping, material damage, instability, and high-temperature annealing limitations, leading to issues like threshold voltage adjustment difficulties, reverse tunneling, and reduced device reliability.
Innovation Solution
A transistor design incorporating spacers with fixed charges between the source and gate, and drain and gate, electrostatically doping the channel to regulate threshold voltage and on/off states, while being compatible with existing fabrication processes, and using various materials to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional thermal diffusion or ion implantation is used to dope low-dimensional semiconductor materials, then doping can be achieved, but the doping is non-uniform and the materials are damaged
Solution Approach 1:
The patent changes the fundamental parameter of doping from traditional thermal diffusion/ion implantation to electrostatic doping using spacers with fixed charges. This parameter change enables uniform doping without material damage, as the electrostatic field from spacers can precisely control carrier distribution in the channel region without the harsh conditions of traditional doping methods.
Solution Approach 2:
The patent introduces spacers as intermediary structures between the source/drain and gate. These spacers contain fixed charges that act as mediators to electrostatically dope the channel region. The spacers serve as the intermediate element that transfers the doping effect without direct contact between dopant ions and the low-dimensional material, avoiding material damage.
2Reliability
If high-temperature annealing above 1000°C is performed to repair lattice damages, then lattice damages can be repaired, but most low-dimensional materials cannot withstand such high temperature
Solution Approach 1:
The patent converts the harmful effect of requiring high-temperature annealing into a benefit by designing a doping process that does not create lattice damages in the first place. The electrostatic doping method using spacers avoids the lattice damage that necessitates high-temperature annealing, thus eliminating the temperature contradiction. The fixed charges in spacers provide the doping effect without damaging the low-dimensional material structure.
3Reliability
If electrostatic doping is performed by depositing material with fixed charges on the channel surface, then threshold voltage can be adjusted, but the entire channel is doped including the gate region which affects gate control
Solution Approach 1:
The patent applies local quality by positioning spacers only in specific regions (source and drain sides) adjacent to the gate, rather than covering the entire channel. This localized placement ensures that electrostatic doping occurs only in the source and drain regions, leaving the gate-controlled channel region undoped and maintaining its electrostatic control capability while still achieving threshold voltage adjustment.
Solution Approach 2:
The patent segments the channel into different regions: the gate-controlled channel region and the spacer-induced doped regions near source and drain. By segmenting the doping application, the gate region maintains its control function while the source/drain regions receive the electrostatic doping effect for threshold voltage adjustment.
4Manufacturing precision
If traditional doping techniques are used, then doping can be achieved, but it is difficult to form uniform and reliable doping in low-dimensional materials
Solution Approach 1:
The patent changes the doping mechanism from physical/chemical processes (thermal diffusion, ion implantation) to an electrostatic process. The electrostatic field from spacers with fixed charges provides precise and uniform carrier distribution in the channel, achieving both manufacturing precision (uniformity) and reliability without the variability inherent in traditional doping methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The spacer-based electrostatic doping improves uniformity, reliability, and reduces parasitic capacitance, preventing hot electron generation and reverse tunneling, thereby enhancing the transistor's performance and suitability for large-scale production.
Implementation Method 1
spacers between the source and the gate and between the drain and the gate, respectively, and have fixed charges... the fixed charges in the spacers are used to electrostatically dope a channel in a spacer region
Data Source
AI summary
A transistor and a fabrication method thereof are provided. The transistor includes a substrate, a low-dimensional material layer, a gate, a source, a drain, a gate dielectric layer, and spacers. The low-dimensional material layer is provided above the substrate. The source is located at a first side of the gate. The drain is located at a second side of the gate. The gate dielectric layer is provided between the gate and the low-dimensional material layer. The spacers are provided between the source and the gate and between the drain and the gate, respectively, and have fixed charges. In the transistor, the fixed charges in the spacers are used to electrostatically dope the channel material in the spacer region.