Transistor Stressor Layer Positioning for Carrier Mobility
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Solution Overview
Problem
Carrier mobility within the channel regions of p-channel transistors in semiconductor-on-insulator architectures remains a challenge, as existing approaches fail to effectively enhance drain current and transconductance.
Innovation Solution
The electronic device incorporates a transistor structure with a layer of specific stress type overlying the field isolation region, where the positional relationship between the active region and the stress layer affects stress within the channel region, increasing carrier mobility by optimizing the stress distribution along the channel width direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual stressor layer is incorporated as an etch-stop layer before forming the PMD layer, then the stress control for n-channel and p-channel transistors is improved, but the carrier mobility within the channel regions of p-channel transistors remains insufficient
Solution Approach 1:
The patent applies local quality by placing a tensile stressor layer specifically adjacent to the active region of the p-channel transistor, rather than using a uniform dual stressor configuration. This localized stress application targets the specific need for improved carrier mobility in p-channel devices without compromising the stress control for n-channel transistors. The tensile stressor layer is positioned to affect only the necessary region, creating different stress conditions in different locations of the device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances carrier mobility within the channel region, improving the performance of p-channel transistor structures by carefully managing stress within the active region, thereby boosting electrical characteristics.
Implementation Method 1
a layer of a first stress type overlying the field isolation region... the layer can affect stress within the field isolation region, which in turn can affect the stress within the active region... increase carrier mobility within the channel region
Data Source
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AI summary
An electronic device (10) can include a transistor structure (50) of a first conductivity type, a field isolation region (22), and a layer (130) of a first stress type overlying the field isolation region. For example, the transistor structure (50) may be a p-channel transistor structure (50) and the first stress type may be tensile, or the transistor structure (60) may be an n- channel transistor structure and the first stress type (70) may be compressive. The transistor structure (50) can include a channel region (54) that lies within an active region. An edge of the active region includes the interface between the channel region (54) and the field isolation region (22). From a top view, the layer can include an edge that lies near the edge of the active region. The positional relationship between the edges can affect carrier mobility within the channel region (54) of the transistor structure (50).