Transistor Switch Control Circuit for Buck Converter Short Through Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Synchronous driving circuits face a short through phenomenon due to overlapping conduction times of high-side and low-side transistors, which is exacerbated by time delays in level shifters and flip-flops, leading to inefficiencies and potential short circuits, especially with short duty cycles in buck converters.
Innovation Solution
A transistor switch control circuit with a delay circuit and a short through preventing circuit that generates a delay signal with a longer pulse width than the duty cycle control signal, ensuring the low-side transistor is turned on after the high-side transistor is off and turned off before it is turned on, thereby preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dead time is set between high-side and low-side transistor control signals, then short through phenomenon is avoided, but overall efficiency is decreased due to longer dead time
Solution Approach 1:
The patent implements dynamic dead time adjustment by detecting the duty cycle of the control signal and automatically setting different dead time values accordingly. When duty cycle is high, a shorter dead time is applied; when duty cycle is low, a longer dead time is applied. This dynamic adaptation resolves the contradiction by optimizing the dead time for each operating condition rather than using a fixed conservative value.
Solution Approach 2:
The patent changes the dead time parameter based on the duty cycle parameter. By monitoring the duty cycle and adjusting the dead time duration accordingly, the system adapts to different operating conditions. This parameter change strategy allows the system to maintain reliability across all duty cycles while minimizing energy loss during transitions.
2Loss of energy
If a fixed short dead time is used, then efficiency is improved, but some transistors may experience short through problem due to different transistor characteristics
Solution Approach 1:
The system transitions from static fixed dead time to dynamic adaptive dead time. By continuously monitoring the duty cycle and adjusting the dead time accordingly, the system adapts to different transistor characteristics and operating conditions, ensuring reliable operation across all transistors while maintaining high efficiency.
Solution Approach 2:
The patent incorporates feedback by detecting the duty cycle of the control signal and using this information to adjust the dead time setting. This closed-loop approach ensures that the dead time is always appropriate for the current operating conditions and transistor characteristics, preventing short through phenomena while minimizing energy loss.
3Reliability
If level shifters and flip-flops are added to detect driving signals, then short through phenomenon is prevented, but time delay increases causing misjudgement on short duty cycle signals
Solution Approach 1:
The patent extracts the essential detection function and implements it directly in the control logic without adding separate level shifter and flip-flop stages. By integrating the detection capability into the existing control signal path, the system maintains reliability in detecting transistor states while minimizing additional time delay that would affect short duty cycle operation.
Solution Approach 2:
The system performs preliminary detection of the duty cycle characteristics before generating control signals. By anticipating the timing requirements based on duty cycle detection, the control logic can prepare appropriate dead time settings in advance, reducing the need for additional delay stages and preventing misjudgement of short duty cycle signals.
4Reliability
If RS flip-flops with NAND gates are used for synchronous control, then transistor switching is coordinated, but time delay occurs causing short through when duty cycle is short
Solution Approach 1:
The patent merges the synchronous control function with the dead time generation logic into a unified control mechanism. By combining these functions rather than using separate RS flip-flop stages, the system maintains coordinated transistor switching while reducing the cumulative time delay that would cause short through phenomena in short duty cycle operations.
Data Source
AI summary
A synchronous driving circuit in the arts may cause a short through pheromone when a duty cycle of a duty cycle control signal is too short. The present invention sets a delay time with a suitable period when the duty cycle of the duty cycle control signal is too short to avoid the short through phenomenon.