Transistor Short Circuit Test Gate Voltage Control
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Solution Overview
Problem
Existing semiconductor test methods face challenges in accurately measuring the short circuit withstand capability of transistor devices due to variations in on-resistance, which can lead to misjudgment of non-defective products as defective, caused by variations in manufacturing and resistance values in the test circuit.
Innovation Solution
The test apparatus controls the gate voltage of the test transistor device to be higher than the test target transistor device, with a controlled difference to minimize variations in on-resistance, ensuring a consistent current and energy application, thereby improving the accuracy of short circuit testing by adjusting the gate voltage and power source voltage dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional test methods are used to measure short circuit withstand capability, then the test can be performed with standard circuit configurations, but variations in on-resistance lead to measurement inaccuracies and misjudgment of non-defective products as defective
Solution Approach 1:
The patent dynamically adjusts the gate voltage applied to the test transistor device during the test. By changing the gate voltage parameter in real-time based on measured current values, the system compensates for on-resistance variations and maintains accurate measurement conditions throughout the test process
Solution Approach 2:
The patent implements a feedback mechanism where the measured current value is continuously monitored and used to adjust the gate voltage. This closed-loop control ensures that the test conditions remain optimal despite variations in device characteristics, thereby improving measurement precision and reliability
2Measurement precision
If the gate voltage is increased to minimize on-resistance variations, then the current consistency improves, but the energy applied to the device may exceed specified limits
Solution Approach 1:
The patent employs dynamic adjustment of the gate voltage rather than using a fixed high voltage. The gate voltage is modulated in real-time based on the measured current, allowing the system to maintain current consistency while adapting the energy input to stay within safe limits throughout the test duration
Solution Approach 2:
The system changes the gate voltage parameter dynamically during the test based on measured conditions. When current approaches target values, the gate voltage is adjusted to maintain consistency without exceeding energy limits, thereby achieving both measurement precision and energy safety
3Measurement precision
If the gate voltage is adjusted dynamically to maintain current consistency, then measurement accuracy improves, but the test circuit complexity increases
Solution Approach 1:
The patent uses a feedback-based control system where the measured current directly influences the gate voltage adjustment. This intuitive feedback mechanism simplifies the control logic compared to complex open-loop schemes, as the system automatically adapts based on real-time measurements without requiring elaborate control algorithms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces variations in current and voltage applied to the test target transistor device, enhancing the accuracy of short circuit testing and preventing misjudgment of non-defective products, while maintaining the energy and current within specified limits.
Implementation Method 1
controls the gate voltage of the test transistor device to be higher than the test target transistor device, with a controlled difference to minimize variations in on-resistance
Data Source
AI summary
A test method of testing a test target transistor device is provided, the test method including: arranging the test target transistor device and a test transistor device in series between a high voltage side wire and a low voltage side wire; and causing a gate voltage applied to the test transistor device to be higher than a gate voltage applied to the test target transistor device. A difference between the gate voltage applied to the test transistor device and the gate voltage applied to the test target transistor device may be 5.0 V or less.