Transistor Testing Circuit with Simultaneous Bias Application

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Solution Overview

Problem

Current transistor testing methods are inefficient as they require testing each transistor individually, leading to long testing times and low efficiency, especially when testing bias voltage characteristics of multiple transistors simultaneously.

Innovation Solution

A circuit and method that allows for simultaneous testing of bias voltage characteristics of multiple transistors using a first power supply voltage terminal, a first control signal terminal, and a set of test terminals, with the option to apply bias voltages to all transistors at once using a selection switch unit, reducing the time required for testing and improving efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If transistors are tested one by one for bias voltage characteristics, then testing accuracy is maintained, but testing time increases significantly and testing efficiency decreases

Engineering Contradiction:
Improvetesting accuracyVSAvoidtesting time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the transistor testing process into two independent stages: (1) simultaneous bias voltage application to multiple transistors, and (2) individual current characteristic measurement. This segmentation allows bias voltage to be applied to all transistors at once while current measurements are taken sequentially, resolving the contradiction between testing accuracy and time consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies bias voltage to all transistors simultaneously before current measurement begins. This preliminary action prepares all transistors in advance for measurement, eliminating the need to apply bias voltage sequentially to each transistor during the measurement process, thus reducing total testing time while maintaining measurement accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If bias voltage is applied to each transistor sequentially, then measurement accuracy is ensured, but productivity and testing efficiency are greatly reduced

Engineering Contradiction:
Improvemeasurement accuracyVSAvoidtesting efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The testing process is segmented into parallel bias voltage application and sequential current measurement phases. Multiple transistors receive bias voltage simultaneously through shared power supply terminals, while current measurements are performed individually. This segmentation enables high productivity during bias application without compromising measurement accuracy during the measurement phase.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses universal power supply terminals (first power supply voltage terminal and first power supply current terminal) that can serve multiple transistors simultaneously. These terminals provide common bias voltage and current to all transistors under test, enabling parallel preparation of multiple devices while maintaining individual measurement capability, thus improving testing efficiency without sacrificing accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10006957B2Circuit and method for testing transistor(s)
Publication Date: 2018.06.26 BOE TECHNOLOGY GROUP CO LTD
  • US10006957B2 patent drawing
  • US10006957B2 patent drawing
  • US10006957B2 patent drawing

AI summary

A circuit and method for testing transistor(s) are provided. The circuit is used for testing a set of transistors including at least two transistors, and the circuit includes: a first power supply voltage terminal connected to first electrodes of the respective transistors; a first control signal terminal connected to control electrodes of the respective transistors; and a set of test terminals including at least two test terminals; the test terminals are connected to second electrodes of the corresponding transistors, respectively.