Transistors With Different Threshold Voltages Using Stacking Faults
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving varying threshold voltages for transistors on a single substrate due to limitations in process-induced strain techniques, particularly in applying stress to channel regions effectively.
Innovation Solution
The semiconductor device incorporates transistors with different channel implant concentrations, halo concentrations, and gate lengths, utilizing a stress memorization technique to form stacking faults in some transistors while maintaining others stress-free, allowing for selective application of stress and adjustment of implant concentrations to achieve distinct threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If process induced strain is applied to enhance carrier mobility in short channel devices, then carrier mobility is improved, but it becomes difficult to achieve varying threshold voltages for transistors on a single substrate
Solution Approach 1:
The patent applies different stress conditions to different transistor regions by selectively forming stacking faults in specific channel regions while maintaining uniform process-induced strain across the substrate. This allows transistors in different regions to have different threshold voltages (some with stress enhancement, others without) while all benefiting from the overall strain effect, thereby achieving both improved carrier mobility and threshold voltage variation on a single substrate.
2Productivity
If stacking faults are formed in channel regions to apply stress, then threshold voltage is reduced and performance is enhanced, but manufacturing complexity increases
Solution Approach 1:
The substrate is divided into multiple regions with different stacking fault configurations. Some regions have stacking faults formed to reduce threshold voltage and enhance performance, while other regions maintain uniform strain without stacking faults. This segmentation allows selective application of stress effects to different transistor types (e.g., drive transistors vs. load transistors) without requiring complex individual processing for each transistor, thereby enhancing overall device performance while managing manufacturing complexity through regionalization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of transistors with different threshold voltages, improving performance and reducing threshold voltage variations, while maintaining stress application in select transistors to enhance performance.
Implementation Method 1
Process induced strain may be used to enhance the carrier mobility in short channel devices by applying stress to the channel regions
Implementation Method 2
performing a heat treatment process to form stacking faults in the amorphous regions in the substrate adjacent the sides of the second and third gate structures
Data Source
AI summary
Integrated circuit device with transistors having different threshold voltages and methods of forming the device are provided. The device may include the first, second and third transistors having threshold voltages different from each other. The first transistor may be free of a stacking fault and the second transistor may include a stacking fault. The concentration of the channel implant region of the third transistor may be different from the concentration of the channel implant region of the first transistor.