Back-Side Power Rail Transistor Structure for Low-Parasitic Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face challenges in achieving faster processing speeds and lower power consumption due to significant parasitic resistance and capacitance in metal routing between active devices and power rails, particularly in analog cells with small geometry sizes.
Innovation Solution
The implementation of semiconductor devices with back-side power rails that shorten the routing distance between active devices and power sources, utilizing via pillars and conductive structures to reduce parasitic resistance and capacitance, and configuring transistor structures to connect front-side metal layers to back-side power rails, thereby enhancing operational speed and reducing cell area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal routing is used to connect active devices to power rails in analog cells, then electrical connection is established, but parasitic resistance and capacitance increase significantly
Solution Approach 1:
The patent introduces a third-dimensional via structure that extends vertically through the substrate, connecting front-side metal routing to back-side power rails. This vertical dimension reduces the horizontal routing distance and minimizes parasitic effects by creating a direct through-substrate connection path.
Solution Approach 2:
The via structure acts as an intermediary element that bridges the front-side active devices and back-side power rails. By introducing this intermediate connection structure, the patent creates a low-parasitic pathway that mediates the electrical connection between the two sides, reducing the harmful parasitic effects of direct metal routing.
2Object-affected harmful factors
If routing distance between active devices and power rails is reduced, then parasitic resistance decreases, but device layout complexity increases
Solution Approach 1:
The patent segments the power delivery path into distinct front-side and back-side components connected by vias. This segmentation allows independent optimization of each segment - the front-side metal routing can be minimized for parasitic reduction while the back-side power rails provide robust power distribution, managing complexity through modular design.
Solution Approach 2:
By utilizing the vertical dimension through via structures, the patent reduces the effective routing distance without increasing planar layout complexity. The third-dimensional connection provides a direct path through the substrate that bypasses the need for extended horizontal metal traces, achieving parasitic reduction while maintaining layout simplicity.
3Object-affected harmful factors
If via structures are introduced to connect front-side and back-side, then parasitic capacitance is reduced, but manufacturing process complexity increases
Solution Approach 1:
The via structures are formed as part of the preliminary substrate preparation and interconnection process, before final device assembly. By pre-forming the via pathways and back-side power rail connections during substrate fabrication, the patent reduces parasitic capacitance while managing manufacturing complexity through integrated process design rather than post-assembly modifications.
Data Source
AI summary
A semiconductor structure is disclosed, including a first conductive line and a first power rail and a first transistor structure arranged between the first conductive line and the first power rail. The first conductive line and the first power rail are separated from each other in a first direction. The first transistor structure includes a first active region coupled to the first conductive line by a first via; a second active region coupled to the first power rail by a second via; and a first gate structure interposed between the first active region and the second active region, and configured to receive a first control signal. The first transistor structure transmits a signal between the first conductive line and the first power rail in response to the first control signal.