High Voltage Transistor Withstand Voltage and Drive Power
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Solution Overview
Problem
High voltage transistors in semiconductor devices face challenges in balancing high withstand voltage and drive power, as low impurity concentration in diffusion layers increases resistance and reduces current, while high impurity concentration can lead to dielectric breakdown.
Innovation Solution
A semiconductor device configuration with a control circuit that adjusts the voltage of metal wiring lines to reduce the electrical resistance of low concentration diffusion layers, thereby improving drive power while preventing dielectric breakdown, by setting certain wiring lines to a floating state or connecting them to the drain or source terminals of high voltage transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If low impurity concentration is used in diffusion layers to increase withstand voltage, then high voltage capability is improved, but electrical resistance increases and drive power decreases
Solution Approach 1:
The patent applies different impurity concentrations to different regions: low impurity concentration in the channel region for high withstand voltage, and high impurity concentration in the source/drain regions for low resistance and high drive power. This local differentiation resolves the contradiction by optimizing each region for its specific function.
Solution Approach 2:
The patent introduces a control circuit that dynamically adjusts the voltage of metal wiring lines based on operational conditions. By changing the voltage state of wiring lines (floating, connected to drain, or connected to source), the system can optimize between withstand voltage and drive power requirements in different operating modes.
2Power
If high impurity concentration is used in diffusion layers to increase drive power, then current flow is improved, but dielectric breakdown risk increases
Solution Approach 1:
The patent concentrates high impurity concentration in the source/drain regions where high current flow is needed, while keeping the channel region with low impurity concentration to maintain high breakdown voltage. This spatial separation allows high drive power without increasing dielectric breakdown risk in the channel.
Solution Approach 2:
The control circuit acts as an intermediary that manages the voltage stress on the gate insulating film by dynamically adjusting wiring line voltages. This prevents excessive electric field buildup that could lead to dielectric breakdown, while still allowing high drive power operation when conditions permit.
3Power
If control circuit adjusts wiring line voltages to optimize drive power, then current flow is improved, but device complexity increases
Solution Approach 1:
The control circuit performs multiple functions: it adjusts wiring line voltages to optimize drive power, prevents dielectric breakdown, and can operate in multiple modes (floating, drain-connected, source-connected). This multi-functionality justifies the added complexity by providing comprehensive performance optimization and protection.
Solution Approach 2:
The control circuit optimizes drive power by changing the voltage parameter of metal wiring lines dynamically. By adjusting this single parameter (wiring line voltage) between discrete states, the system achieves significant performance improvement without requiring complex multi-parameter control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simultaneously enhances the withstand voltage and drive power of high voltage transistors by managing the electric field and resistance in the diffusion layers, preventing dielectric breakdown and optimizing current flow.
Implementation Method 1
A semiconductor device configuration with a control circuit that adjusts the voltage of metal wiring lines to reduce the electrical resistance of low concentration diffusion layers
Implementation Method 2
This configuration simultaneously enhances the withstand voltage and drive power of high voltage transistors by managing the electric field and resistance in the diffusion layers, preventing dielectric breakdown
Data Source
AI summary
A semiconductor device according to an embodiment comprises: a field effect transistor comprising a semiconductor layer and a gate electrode; a wiring line layer positioned above the field effect transistor; and a control circuit that adjusts a voltage of a wiring line in the wiring line layer. The wiring line layer comprises: a contact wiring line connected to a source or a drain of the field effect transistor; and a first wiring line facing a position between the gate electrode and the contact wiring line, of the semiconductor layer. The control circuit adjusts the contact wiring line to a certain voltage and sets the first wiring line to a floating state.