Transmission Gate Circuit for High-Voltage Open-Drain I/O
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Solution Overview
Problem
Existing transmission gate circuits in integrated circuits cannot support a true open drain mode of operation, leading to signal contention issues and excessive current draw due to the inability to handle high input voltages safely.
Innovation Solution
A transmission gate circuit design that includes stacked MOSFET stages and level-shifting of the enable signal into a biasing voltage domain, allowing it to tolerate higher input voltages and provide over-voltage protection, enabling both high voltage protection in flash characterization mode and low resistive path/open-drain functionality in normal mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transmission gate circuit is designed to handle high input voltages (up to 15V) for flash characterization mode, then over-voltage protection is provided, but the circuit cannot support true open drain mode operation with high input voltages (up to 5.5V) when VDD is at lower levels (1.7V to 3.6V)
Solution Approach 1:
The transmission gate circuit is divided into multiple switching devices (first switching device for high voltage path, second switching device for low voltage path) that operate in different voltage domains. This segmentation allows the circuit to handle both high voltage flash characterization mode and low voltage open drain mode independently without interference, resolving the contradiction between over-voltage protection and open drain functionality.
Solution Approach 2:
A control electrode and associated control circuitry act as an intermediary between the high voltage domain and low voltage domain. The control electrode receives control signals and adjusts the conductivity of the first switching device accordingly, enabling the circuit to switch between flash characterization mode and open drain mode based on voltage conditions without direct conflict between the two operating modes.
2Reliability
If stacked MOSFET stages are used to provide voltage protection, then high voltage tolerance is achieved, but device complexity increases
Solution Approach 1:
The stacked MOSFET stages are designed to perform multiple functions: they provide voltage protection during flash characterization mode, enable true open drain operation during normal mode, and maintain compatibility with both high voltage and low voltage operating conditions. This multi-functionality reduces the need for separate protection circuits, thereby limiting the increase in device complexity while achieving comprehensive voltage protection.
3Productivity
If the transmission gate provides a low resistive path in normal I/O mode, then signal transmission efficiency is improved, but the circuit becomes vulnerable to damage from high voltages during flash characterization
Solution Approach 1:
The transmission gate circuit dynamically adjusts its resistance based on the operating mode. During normal I/O mode, the circuit maintains a low resistive path for efficient signal transmission. During flash characterization mode, the circuit dynamically increases its resistance to block high voltages, preventing damage. This dynamic behavior is controlled by the control electrode and switching devices that respond to voltage conditions and mode signals.
Solution Approach 2:
The control circuitry detects the operating mode in advance and preemptively adjusts the conductivity of the transmission gate accordingly. Before high voltage damage can occur during flash characterization, the control electrode already has the first switching device in a non-conductive state, preventing the harmful high voltage from reaching the low voltage circuitry. This preliminary protective action eliminates the vulnerability while preserving low-resistance operation during normal mode.
Data Source
AI summary
A transmission gate circuit includes a pass gate and a control circuit and provides High Voltage protection to a flash memory in a characterization mode and a low resistive path with true open-drain functionality in a normal mode. A native NMOSFET in series with the pass gate provides overvoltage protection for additional circuitry. Well biasing, gate tracking and internal node clamping circuits ensure that all of the devices of the pass gate and control circuit operated within safe operational voltage levels. The two modes of operation can be selected by an enable signal. The transmission gate circuit can support up to a 5.5 volts input in a true open drain mode while an input/output supply voltage of 3.3 volts is supplied.


