Transmission Gate STRAM for Symmetric Driving

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Solution Overview

Problem

Spin-Transfer Torque RAM (STRAM) faces challenges in scaling below 0.13 micrometers due to asymmetric driving ability across the technology, limiting its ability to scale down and increasing power consumption.

Innovation Solution

Incorporating a transmission gate with a parallel electrical connection between an NMOS and a PMOS transistor, allowing for symmetric driving ability by enabling separate addressability and current flow direction control, even at low voltage levels, to maintain efficient switching between low and high resistance states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If a single transistor is used in STRAM to reduce area, then area is reduced, but driving ability becomes asymmetric and scaling is limited

Engineering Contradiction:

Improvetransistor areaVSAvoiddriving ability symmetry

Core Design Contradiction:

Area of moving objectVSEase of operation

Solution Approach 1:

The patent combines NMOS and PMOS transistors in a transmission gate configuration to achieve symmetric driving ability in both directions while maintaining compact area. The parallel connection of complementary transistors provides balanced current driving capability without requiring separate transistors for each direction.

Inventive Principle:

Principle #5Merging (Combining)

2Length of moving object

If MTJ size is reduced to improve scaling, then scaling is improved, but switching magnetic field amplitude increases and variation becomes severe

Engineering Contradiction:

ImproveMTJ sizeVSAvoidswitching variation

Core Design Contradiction:

Length of moving objectVSReliability

Solution Approach 1:

The patent replaces the conventional magnetic field-based switching mechanism with a spin-polarized current-based switching mechanism. This substitution allows for local confinement of the switching action within the MTJ, enabling better scaling without increasing switching field amplitude or variation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Stability of the object's composition

If conventional MRAM switching mechanism is used, then non-volatility is achieved, but power consumption increases and scaling is limited

Engineering Contradiction:

Improvenon-volatilityVSAvoidpower consumption

Core Design Contradiction:

Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent changes the fundamental switching parameter from magnetic field amplitude to spin-polarized current density. This parameter change enables lower power consumption and better scaling while maintaining the non-volatile storage capability through the MTJ's resistance states.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables symmetric driving ability and efficient scaling of STRAM technology, reducing power consumption and enhancing its scalability, while maintaining effective switching between resistance states.

Implementation Method 1

Data storage is realized by switching the resistance of MTJ between a high-resistance state and a low-resistance state. MRAM switches the MTJ resistance by using a current induced magnetic field to switch the magnetization of MTJ.

Methodology Applied

Scientific EffectSpin transfer torque:

Implementation Method 2

The basic component of MRAM is a magnetic tunneling junction (MTJ). Data storage is realized by switching the resistance of MTJ between a high-resistance state and a low-resistance state.

Methodology Applied

Scientific EffectMagnetic tunneling:

Implementation Method 3

A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS8416615B2Transmission gate-based spin-transfer torque memory unit

Publication Date: 2013.04.09 EVERSPIN TECHNOLOGIES INC

AI summary

A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.