Transmitter Equalization Using Common-Net Bias Boosting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional transmitter equalization designs consume high power due to operating all nets at high speeds and result in poor equalization when timing shifts occur, especially when transmitting DC signals, as they require additional power for short currents between main-cursor and post-cursor driver slices.
Innovation Solution
The solution involves a transmitter driver with a driver bias circuit that boosts the bias level on a common net of the transmitter driver in response to data transitions, rather than on the differential output terminals, reducing power consumption and improving equalization by performing equalization on the common net rather than the output, thus minimizing power usage and maintaining effective equalization even with timing shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional equalization is arranged on the output of the transmitter driver with multiple driver slices operating at high speed, then equalization effect is improved, but power consumption increases significantly
Solution Approach 1:
The patent extracts the equalization function from the high-speed differential output path and relocates it to the lower-speed common net path. By taking out the equalization operation from the main-cursor and post-cursor driver slices that operate at high speed, and performing it instead on the common net at lower speed, the patent achieves effective equalization while dramatically reducing power consumption.
Solution Approach 2:
The patent changes the dimension of equalization operation from the differential output domain to the common net domain. Instead of equalizing the high-speed differential signals at the output, the patent performs equalization on the common net which operates at a different (lower) speed dimension, thereby achieving the same equalization effect with reduced power consumption.
2Measurement precision
If timing shift is applied in conventional transmitter equalization, then some equalization effect is achieved, but equalization performance deteriorates and additional power is consumed for short current between driver slices
Solution Approach 1:
The patent introduces the common net as an intermediary for performing equalization. Instead of directly equalizing the differential output signals which requires timing alignment and consumes power for short current, the patent uses the common net as an intermediary path to perform equalization indirectly, avoiding the harmful short current effects and reducing power loss.
3Speed
If all nets including pre-cursor, main-cursor and post-cursor driver slices are operated at high speed, then data transmission speed is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by differentiating the operating speeds of different parts of the transmitter circuit. The main-cursor and post-cursor driver slices that handle data transmission operate at high speed to maintain data transmission performance, while the common net used for equalization operates at lower speed, reducing power consumption in that specific region without affecting overall transmission speed.
Data Source
AI summary
A transmitter with low power and high accuracy equalization is shown. The transmitter includes a transmitter driver and a driver bias circuit. The transmitter driver receives data, and generates a positive differential output and a negative differential output to be transmitted by the transmitter. The driver bias circuit is coupled to the transmitter driver to bias the transmitter driver, wherein the driver bias circuit is configured to boost the bias level of the transmitter driver in response to transitions of the data.