Differential Transmitter Driver for AC Test Signal Injection
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Solution Overview
Problem
Existing IEEE standards, such as JTAG and AC-JTAG, primarily focus on testing DC-coupled and AC-coupled interconnects separately, lacking effective methods for testing AC-coupled interconnects without impacting the core logic circuitry in high-speed transceivers, which complicates the integration of test signal injection and affects power consumption, wiring complexity, and timing in transmitters.
Innovation Solution
A transmitter configuration with a driver circuit that includes a differential transistor pair, resistor pair, transistor pair, and bridge transistor, along with three-state circuit elements, allows for AC test signal injection after the final clocked circuit element, enabling test mode operation without modifying sequential logic, thus reducing power consumption and wiring complexity while maintaining timing and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If test logic is added to the transmitter to enable AC test signal injection, then testing capability for AC-coupled interconnects is improved, but device complexity and power consumption increase
Solution Approach 1:
The driver circuit is designed to perform both mission mode signal transmission and test mode signal injection using the same circuit components. The three-state circuit elements enable the driver to selectively connect to either mission mode inputs or test mode inputs based on the mode select signal, allowing one circuit to serve multiple functions without requiring separate dedicated test circuitry
Solution Approach 2:
The circuit employs dynamic switching through three-state circuit elements that can change their connection state based on the mode select signal. This dynamic reconfiguration allows the driver circuit to adapt its connectivity - connecting to mission mode data paths during normal operation and to test signal paths during testing, thereby enabling testing capability without permanent structural modification
2Adaptability or versatility
If test logic is added to the transmitter to enable AC test signal injection, then testing capability for AC-coupled interconnects is improved, but power consumption increases
Solution Approach 1:
The three-state circuit elements dynamically switch between high-impedance state during mission mode and active state during test mode. This dynamic switching ensures that test-related circuitry consumes minimal power during normal operation while being fully functional during testing, thereby adding testing capability without continuous power overhead
Solution Approach 2:
The circuit applies different operational characteristics to different parts based on mode. During mission mode, only the essential driver circuitry is active with minimal power consumption. During test mode, the additional test signal path components are activated. This localized activation of circuit functions reduces overall power consumption compared to having all test components permanently active
3Adaptability or versatility
If additional circuitry is added for test mode operation, then testing capability is improved, but timing and speed performance are degraded
Solution Approach 1:
The input stage is segmented into separate mission mode input paths and test mode input paths that are selectively connected through three-state circuit elements. This segmentation allows test signals to be injected at a specific point in the signal path without requiring modification of the entire transmitter architecture, thereby maintaining high-speed performance of the core logic while adding testing capability
Solution Approach 2:
The three-state circuit elements act as intermediaries that selectively connect different signal sources to the driver circuit. During test mode, they mediate between the test signal generator and the driver input, allowing test signals to pass through without requiring the core logic circuitry to operate in test mode, thus preserving timing and speed performance
Data Source
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AI summary
In one example, a driver circuit includes a differential transistor pair (504) configured to be biased by a current source (502) and including a differential input (516) and a differential output (512). The driver circuit further includes a resistor pair (506) coupled between a node pair and the differential output, a transistor pair coupled between a voltage supply and the node pair, and a bridge transistor coupled between the node pair. The driver circuit further includes a pair of three-state circuit elements (510) having a respective pair of input ports, a respective pair of control ports, and a respective pair of output ports. The pair of output ports is respectively coupled to the node pair. The pair of control ports is coupled to a common node comprising each gate of the transistor pair and a gate of the bridge transistor.