Transmitter-Side Equalizer for High-Speed Serial Link Reflection Cancellation
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Solution Overview
Problem
High speed serial data links face noise and inter-symbol interference due to impedance discontinuities, which current equalization techniques struggle to address effectively, especially at higher data rates, requiring significant resources and latency.
Innovation Solution
A method and apparatus using a programmable delay element and driver stage to transmit compensating pulses with specific amplitudes and delays to cancel out reflections, employing a floating tap finite impulse response equalizer, which is cost-effective and does not add latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If decision feedback equalization (DFE) is used to remove inter-symbol interference, then interference removal capability is improved, but integrated circuit die area and power consumption increase significantly
Solution Approach 1:
The patent extracts the equalization function from the receiver to the transmitter side. By placing the equalizer at the transmitter, the complex DFE structure with hundreds of taps is eliminated from the receiver, significantly reducing receiver die area while maintaining interference cancellation capability.
Solution Approach 2:
The patent inverts the conventional equalization approach by implementing equalization at the transmitter rather than the receiver. This reversal allows the use of simpler transmitter-side circuitry to achieve what traditionally required complex receiver-side processing.
2Object-affected harmful factors
If decision feedback equalization (DFE) is used to remove inter-symbol interference, then interference removal capability is improved, but power consumption increases significantly
Solution Approach 1:
The patent extracts the equalization function from the receiver to the transmitter side. By placing the equalizer at the transmitter, the complex DFE structure with hundreds of taps is eliminated from the receiver, significantly reducing receiver die area while maintaining interference cancellation capability.
3Object-affected harmful factors
If conventional transmitter equalization is used, then early reflections are compensated, but latency is reduced and late reflections remain unhandled
Solution Approach 1:
The patent implements a dynamic equalizer with adjustable delay elements that can adapt to different reflection scenarios. The equalizer can be configured to compensate for reflections occurring at various time delays, making the system versatile for handling both early and late reflections depending on the specific channel conditions.
4Manufacturing precision
If more taps are added to DFE to equalize 10 Gbps link with 3.5 ns delay, then equalization performance is improved, but device complexity increases
Solution Approach 1:
The patent extracts the equalization function from the receiver to the transmitter side. By placing the equalizer at the transmitter, the complex DFE structure with hundreds of taps is eliminated from the receiver, significantly reducing receiver die area while maintaining interference cancellation capability.
Solution Approach 2:
The patent uses a simplified transmitter-side equalizer that creates a compensation signal based on a copy of the transmitted data. This approach avoids the need for complex receiver-side tap structures while achieving equivalent equalization performance through a simpler architecture.
Data Source
AI summary
A method and apparatus for equalizing a reflection in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a compensating pulse that is transmitted in response to a pulse transmitted on the serial link. The apparatus comprises a programmable delay element and a driver stage configured to transmit a delayed and amplitude adjusted version of a pulse transmitted on the serial link. A method for equalizing a plurality of reflections in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a first compensating pulse and an amplitude and delay time of a second compensating pulse. The method further involves transmitting the first compensating and second compensating pulses in response to a pulse transmitted on the serial link.