Transmitter Framer for Parallel Symbol Block Processing

Solution Overview

Problem

Current data transmission technologies face challenges in efficiently processing and transmitting large volumes of data at high speeds, requiring improvements in both transmitter and receiver efficiency.

Innovation Solution

The implementation of a framer system that organizes bits into parallel symbol blocks, forming frames for transmission, which facilitates speedy and efficient processing by mapping user bits into quadrature modulated symbols and combining them into composite signals for transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transmitted at increasingly faster speeds with larger quantities, then throughput is improved, but processing efficiency in transmitter and receiver deteriorates

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the data stream into parallel symbol blocks, where each block contains a specific number of symbols. This segmentation allows the receiver to process multiple blocks in parallel, improving processing efficiency while maintaining high throughput. The framer divides the incoming bit stream into fixed-size blocks that can be independently processed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a parallel processing dimension by organizing symbols into multiple blocks that can be processed simultaneously rather than sequentially. This dimensional change from serial to parallel processing enables the system to handle larger quantities of data at faster speeds without compromising processing efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If symbols are organized into parallel symbol blocks forming frames, then processing speed is improved, but frame structure complexity increases

Engineering Contradiction:
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The frame structure is segmented into multiple symbol blocks, each with a predetermined number of symbols. This segmentation provides a regular, predictable structure that facilitates efficient processing while maintaining organizational simplicity. Each block can be processed independently with the same processing logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses fixed parameters for frame structure (block size, number of symbols per block) that can be configured but remain constant during operation. This parameter-based approach allows flexibility in adapting to different requirements while maintaining a simple, regular structure that doesn't increase complexity.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If frame attributes are designed for processing advantages, then receiver processing efficiency is improved, but transmitter design complexity increases

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The transmitter performs preliminary organization of data into standardized symbol blocks with specific attributes before transmission. This preliminary structuring simplifies the receiver's processing task, as the data arrives in a format optimized for efficient processing. The complexity is shifted to the transmitter where it can be handled systematically.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The frame structure is designed with universal attributes that serve multiple functions: error correction, synchronization, and efficient processing. This multi-functionality reduces the need for separate structures for each purpose, maintaining transmitter design simplicity while achieving multiple goals.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11159243B2Systems and methods for creating in a transmitter a stream of symbol frames configured for efficient processing in a receiver
Publication Date: 2021.10.26
  • US11159243B2 patent drawing
  • US11159243B2 patent drawing
  • US11159243B2 patent drawing

AI summary

A system and method of creating frames comprised of blocks, where each block comprises data symbols corresponding to a higher order quadrature modulation format and support symbols corresponding to a lower order modulation format. One or more of the blocks can further comprise markers comprising distinct symbol patterns. The markers can mark the start of each frame and/or another location in the frame. The support symbols can be in a common location in each block.