Transmitter-Side Link Training for In-Band Clock Alignment
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Solution Overview
Problem
Configuring high-speed chip-to-chip links for efficient communication is challenging due to inherent latencies and requires additional pins or complex mechanisms that increase circuit area and reduce efficiency.
Innovation Solution
Implement in-band messaging for link training using configurable delay circuits and adjustable clock signals, allowing for efficient alignment of data lanes through a training process that adjusts trim settings on the transmitter or receiver side.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dedicated low-speed side band channel is utilized for exchanging messages to determine delay value, then link configuration accuracy is improved, but pin count and circuit area increase
Solution Approach 1:
The patent merges the link training and delay adjustment functions into the existing high-speed data lanes by implementing in-band messaging. The receiver sends delay adjustment messages through the same data lanes used for normal data communication, eliminating the need for separate dedicated channels and reducing pin count while maintaining configuration accuracy.
Solution Approach 2:
The data lanes are made multi-functional by enabling them to serve both as high-speed data communication channels and as carriers for link training messages. This allows the same physical infrastructure to perform multiple functions, reducing the overall circuit area without sacrificing the precision of delay value determination.
2Reliability
If additional control lanes are added for link configuration, then link setup reliability is improved, but link efficiency decreases during normal operation
Solution Approach 1:
The patent combines link configuration messages with normal data traffic on the same lanes, allowing the link setup process to occur without dedicated control lanes. This merging ensures reliable link configuration while maintaining full link efficiency during normal operation, as no separate control infrastructure is needed.
Solution Approach 2:
The data lanes continue to serve their primary function of high-speed data communication throughout the link training process and normal operation. The in-band messaging allows link configuration to occur continuously without interrupting or reducing the bandwidth available for data transmission, maintaining continuous useful action on the link.
3Manufacturing precision
If switching between low and high bandwidth operation is used to determine delay setting, then link configuration is achieved, but design complexity increases and high speed performance may degrade
Solution Approach 1:
The patent uses parameter changes in the form of encoded delay adjustment messages transmitted through the data lanes. Instead of switching bandwidth modes, the system adjusts delay settings by modifying control parameters carried within the existing high-speed data communication framework, simplifying the design while maintaining precision.
Solution Approach 2:
The patent replaces the mechanical approach of switching between different bandwidth modes with a more elegant parameter-based solution. By using in-band messaging to carry delay adjustment information, the system substitutes physical bandwidth switching with intelligent parameter modification, reducing design complexity and avoiding high-speed performance degradation.
4Ease of operation
If special software or logic is used to manage initial link configuration, then configuration control is improved, but implementation becomes impractical when link is the only path and speed decreases
Solution Approach 1:
The patent implements self-service by enabling the receiver to automatically send delay adjustment messages back to the transmitter through the data lanes without requiring external software intervention. The link configuration process becomes autonomous, using the existing high-speed path to exchange control information, which makes it practical for single-link configurations and significantly increases configuration speed.
Solution Approach 2:
The patent performs preliminary action by establishing the in-band messaging mechanism during the link training phase, allowing subsequent configuration messages to be exchanged rapidly through the already-established high-speed data lanes. This preliminary setup eliminates the need for slow external software coordination and enables fast autonomous configuration control.
Data Source
AI summary
Systems including a first circuit and a second circuit, with a multi-data lane link between the first circuit and the second circuit. The first circuit and the second circuit are configured to determine a delay setting of a clock signal forwarded from the first circuit to the second circuit by utilizing a first distinct subset of the data lanes to communicate commands redundantly encoded in multiple unit intervals of the data lanes and by utilizing a second distinct subset of the data lanes to communicate results of the commands.