Transmitter Module Stepwise Resistor Control for Bus Signal Emissions

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing transmission/reception devices in serial bus systems face challenges in minimizing electromagnetic emissions during signal state transitions, which is crucial for meeting electromagnetic compatibility requirements. Additionally, these devices are limited by high circuit and development efforts, and they struggle to adapt to different communication standards efficiently.

Innovation Solution

A transmission module designed with parallel circuits made of switchable resistors and a control section for step-by-step control of these resistors, allowing for the generation of desired signal states on the bus. This module uses resistance blocks and a logic block to control the switchable resistors, optimizing the transition between signal states to minimize electromagnetic emissions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the transceiver uses switched resistors in the full bridge to generate signal states, then the desired signal states can be generated with corresponding resistance and voltage, but electromagnetic emissions are caused by fluctuations in the common-mode signal during transitions

Engineering Contradiction:
Improvesignal state generationVSAvoidelectromagnetic emissions
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The transition process is segmented into multiple discrete steps using a delay chain. Instead of a single abrupt transition, the common-mode level is adjusted in successive stages through multiple switching events, each separated by a delay period. This segmentation reduces the spectral density of electromagnetic emissions by distributing the transition energy across time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common-mode level is adjusted in advance before the differential signal transition occurs. The control logic first switches the common-mode resistors to the target resistance value, waits for the delay chain to expire, and then switches the differential signal. This preliminary adjustment of the common-mode level prevents simultaneous switching of differential and common-mode signals, reducing electromagnetic interference.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If analog time step generators are used to generate transitions between signal states, then the transition shape can be optimized to approximate the error function, but the circuit complexity and development effort increase significantly

Engineering Contradiction:
Improvetransition shape optimizationVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A single delay chain is designed to serve multiple purposes: it controls the timing of common-mode resistor switching, generates intermediate transition states, and coordinates the overall transition sequence. This universal delay chain replaces what would otherwise require multiple specialized analog time step generators, significantly reducing circuit complexity while maintaining the ability to generate optimized error-function-like transition shapes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The transition characteristics are controlled by changing the resistance values in the delay chain rather than using complex analog circuitry. By adjusting the resistance parameters in the delay chain, the transition shape can be optimized to approximate the error function without requiring multiple specialized generators. This parameter-based control simplifies the circuit while achieving the desired transition optimization.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple chains are used to generate multiple static states in CAN XL, then the five signal states can be generated, but the circuit area and power consumption increase significantly

Engineering Contradiction:
Improvesignal state coverageVSAvoidcircuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

Multiple chains that would traditionally be required to generate five different static states are merged into a single delay chain structure. The single delay chain, combined with the full-bridge resistor network, can generate all five CAN XL signal states (REC, SIC, DOM, LV0, LV1) by controlling the switching sequence and timing. This merging reduces the circuit area and power consumption while maintaining full signal state coverage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system uses dynamic switching control to generate multiple static states from a single configurable structure. The delay chain can be programmed with different delay values to dynamically adapt to different signal state transitions, eliminating the need for multiple dedicated chains for each state. This dynamic approach allows the same hardware to serve multiple functions across different operating modes.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution significantly reduces electromagnetic emissions, lowers circuit and development efforts, and allows for seamless adaptation to various communication standards, ensuring efficient and error-free communication in serial bus systems.

Implementation Method 1

Depending on the number of conductive resistors, a corresponding resistance is established at the output of the full bridge, and a corresponding voltage can be generated on the bus. Thus, each desired signal state on the bus is determined by its open-circuit voltage and internal resistance.

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

The control part is designed to generate the intermediate states on the bus predetermined by the digital transmission signal over time by step-by-step changing over time the number of actively switched resistor blocks.

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentEP4554151A1Transmission module for a transmission/reception device of a subscriber station of a serial bus system and method for transmitting a message with differential signals in a serial bus system
Publication Date: 2025.05.14 ROBERT BOSCH GMBH
  • EP4554151A1 patent drawingFigure 1~2
  • EP4554151A1 patent drawingFigure 3~4
  • EP4554151A1 patent drawingFigure 5~6

AI summary

A transmitter module (121) for a transmit-receive device (12) of a subscriber station (10; 30) of a serial bus system (1) and a method for sending a message (45) with differential signals (CAN_H, CAN_L) in a serial bus system are provided. The transmitter module (121) is configured to send a digital transmit signal (TxD_INT) as an analog differential signal (CAN_H, CAN_L) to a bus (40) of the bus system (1) in order to send a message (45) to at least one other subscriber station (10; 20; 30) of the bus system (1), wherein the transmitter module (121) comprises transmit stages (121A; 121B; 121C; 121D) with parallel circuits (121A1; 121VB1; 121C1; 121D1) of switchable resistors (R_A1 ...R_AN; R_B1 ...R_BN; R_C1 ... R_CN; R_D1 ... R_DN), and a control unit (15) for stepwise control of the switching of the switchable resistors (R_A1 ... R_AN; R_B1 ... R_BN; R_C1 ... R_CN; R_D1 ... R_DN), where at least two of the switchable resistors (R_A2, R_A3; RA4 ... R_A7; R_A8 ... R_A16) are arranged in a resistor block (162; 163; 164) in a switchable manner, wherein at least two resistor blocks (161; 162; 163; 164) are provided, which have at least one of the switchable resistors (R_A2, R_A3; RA4 ... R_A7; R_A8 ... R_A16), and wherein the control part (15) is configured to generate the bus states (401; 402; 403; LV0; LV1) specified by the digital transmit signal (TxD) over time (t) on the bus (40) by stepwise changing over time (t) the number of actively switched resistor blocks (162; 163; 164).