Transmitter Circuit Output Stop Circuit ESD Protection
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Solution Overview
Problem
Conventional micro-isolator transmitter circuits face failures during electrostatic discharge damage tests due to excessive power supply voltage, leading to erroneous pulses and breakdowns of insulating coupling elements, which existing electrostatic discharge protection circuits cannot effectively suppress.
Innovation Solution
Incorporating an output stop circuit that temporarily halts the output of pulse signals when the power supply is turned on, preventing excessive current flow and erroneous pulses, thereby mitigating the risk of circuit failure during electrostatic discharge tests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large current flows in short time period from transmitter circuit to transformer, then high-speed operability and low power consumption are improved, but power supply voltage exceeds specified voltage causing erroneous pulses and circuit breakdown
Solution Approach 1:
The output stop circuit proactively prevents output pulse signal generation during the unstable period immediately after power supply activation. By anticipating the potential for erroneous pulses due to unstable internal node states, the circuit suppresses output before errors can occur, ensuring reliable operation during electrostatic discharge tests while maintaining high-speed performance characteristics.
2Power
If output driver unit causes large current to flow through transformer, then drive performance is improved, but current greater than permissible value flows when power supply voltage is largely higher than specified voltage
Solution Approach 1:
The output stop circuit acts as an intermediary control mechanism between the power supply activation and the output driver operation. It temporarily blocks the output driver during the unstable startup period, preventing excessive current flow when power supply voltage exceeds specified levels, while allowing full drive performance when the system is stable and operating normally.
3Loss of time
If pulse generating unit outputs pulses immediately after power supply is turned on, then response time is reduced, but internal nodes are unstable causing erroneous pulses
Solution Approach 1:
The output stop circuit implements preliminary suppression of pulse output during the unstable period following power supply activation. By preemptively blocking output during this transient phase, the circuit prevents erroneous pulses from reaching the transformer, ensuring reliable signal transmission once the system stabilizes while maintaining minimal response time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The output stop circuit effectively suppresses the output of erroneous pulses and excessive current, preventing failures in the transmitter circuit and insulating coupling elements during electrostatic discharge tests, ensuring reliable operation.
Implementation Method 1
a pulse signal capable of distinguishing between the rising edge and the falling edge of the data signal is transmitted from a transmitter circuit
Implementation Method 2
The electrostatic discharge protection circuit is mounted for protecting the internal circuitry of a semiconductor apparatus from high voltage pulses generated by electrostatic discharge
Data Source
AI summary
The transmitter circuit according to one embodiment includes a pulse generating circuit generating a pulse signal based on edges of input data, a first output driver outputting, based on the pulse signal, a first output pulse signal according to one of the edges to a first end of an external insulating coupling element, a second output driver outputting, based on the pulse signal, a second output pulse signal according to other one of the edges to a second end of the insulating coupling element, and an output stop circuit stopping the first and second output pulse signals from being output for a prescribed period from when a power supply voltage is turned on.


