Transparent Capacitor Driving Circuit for Slim Display Borders
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Solution Overview
Problem
Conventional LCD panel designs with non-transparent metal gate driver on array (GOA) structures in the sealant area hinder dense component arrangement, preventing the achievement of a slim border due to the need for a sufficient transparent region for UV curing.
Innovation Solution
Incorporating a driving circuit with a transparent capacitor formed by a first transparent electrode layer, a second transparent electrode layer, and a dielectric layer, which allows for a more dense design and increased transmittance, enabling the sealant curing process even when overlapping with the transparent capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If non-transparent metal GOA structure is used in the sealant area, then the driving circuit can be implemented, but the component arrangement becomes sparse and the border cannot be slim
Solution Approach 1:
The patent changes the transparency parameter of the capacitor electrode from non-transparent metal to transparent material (such as ITO), allowing UV light to pass through the sealant area for proper curing while maintaining the driving circuit functionality. This parameter change enables both dense component arrangement and effective sealant curing.
2Reliability
If sufficient transparent region is provided for sealant curing, then UV curing can be effective, but the GOA structure cannot be densely designed
Solution Approach 1:
The patent changes the transparency parameter of the capacitor electrode from non-transparent to transparent, allowing UV light to penetrate through the sealant area for effective curing while enabling dense component arrangement in the previously required transparent region.
3Area of moving object
If transparent capacitor is used to increase transmittance, then dense design is enabled and border is reduced, but the capacitor structure becomes more complex
Solution Approach 1:
The patent implements the transparent capacitor using a multi-layer transparent electrode structure (first transparent electrode layer, second transparent electrode layer, and dielectric layer) that utilizes the vertical dimension to create capacitance while maintaining transparency in the horizontal plane, enabling dense design and slim border.
4Device complexity
If non-transparent metal is used for GOA components, then the structure is simple, but the border cannot be slim due to required transparent region
Solution Approach 1:
The patent changes the transparency parameter of the capacitor electrode from non-transparent metal to transparent material, eliminating the need for a separate transparent region and enabling a slim border while maintaining structural simplicity through the transparent capacitor design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces the border of the display panel by allowing a more compact arrangement of the driving circuit components in the sealant area, enhancing the slim border effect while ensuring effective sealant curing.
Implementation Method 1
the first transparent electrode layer and the second transparent electrode layer are electrically coupled to each other to form at least one transparent capacitor
Implementation Method 2
The dielectric layer is located between the first transparent electrode layer and the second transparent electrode layer
Implementation Method 3
the transparent capacitor can increase the transmittance needed by the sealant curing process
Data Source
AI summary
A display panel, which has a display region and a non-display region, includes an active array substrate and an opposite substrate disposed opposite to the active array substrate. The active array substrate includes a substrate, a pixel array, and a driving circuit. The pixel array and the driving circuit are disposed on the substrate, wherein the pixel array is located in the display region and the driving circuit is located in the non-display region. The driving circuit includes a first transparent electrode layer, a second transparent electrode layer, and a dielectric layer. The dielectric layer is located between the first transparent electrode layer and the second transparent electrode layer, wherein the first transparent electrode layer and the second transparent electrode layer are electrically coupled to each other to form at least one transparent capacitor.


