Transparent Electrode Layout for IPS LCD Aperture Ratio
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Solution Overview
Problem
In-plane switching (IPS) mode liquid crystal displays (LCDs) face challenges with aperture ratio degradation due to opaque common and pixel electrodes, which also lead to luminance issues and potential short-circuiting of common and gate lines, affecting viewing angle and production yield.
Innovation Solution
The use of transparent conductive materials for common and pixel electrodes, with common lines formed parallel to data lines and shorter than gate lines, and the placement of common lines under insulation to prevent short-circuiting, improves aperture ratio and stabilizes voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If opaque common and pixel electrodes are used in IPS mode LCD, then electrical connection and switching function are achieved, but aperture ratio is degraded and luminance is reduced
Solution Approach 1:
The patent changes the material parameter of the electrodes from opaque to transparent conductive materials (such as ITO - Indium Tin Oxide), which fundamentally alters the optical properties while maintaining electrical functionality. This allows the electrodes to be transparent in the visible spectrum, thereby increasing the aperture ratio without sacrificing electrical connection capability.
2Ease of manufacture
If common lines are formed parallel to gate lines to simplify structure, then manufacturing is easier, but short-circuiting between common lines and gate lines occurs
Solution Approach 1:
The patent introduces a vertical dimension (depth layer) to separate the common lines from gate lines. By positioning common lines in a lower layer and gate lines in an upper layer, the design maintains planar simplicity for manufacturing while adding vertical separation to prevent short-circuits. This dimensional transition resolves the conflict between manufacturing ease and electrical isolation.
Solution Approach 2:
The patent introduces an insulation film as an intermediary barrier between the common lines and gate lines. This intermediary layer physically separates the conductive elements while allowing the structure to remain simple for manufacturing. The insulation film acts as a mediator that prevents direct contact and short-circuiting between the common lines and gate lines.
3Stability of the object's composition
If common lines are made longer to span entire display, then voltage distribution is improved, but resistance increases causing voltage instability and flickering
Solution Approach 1:
The patent segments the common line structure by introducing common line extensions that branch off from the main common line at regular intervals. This segmentation creates multiple parallel current paths, reducing the overall resistance while maintaining voltage distribution across the display. The segmented structure allows voltage to be supplied through multiple routes, preventing voltage instability and flickering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the viewing angle by 8% to 30%, reduces common line resistance, prevents short-circuiting, and improves production yield by maintaining stable common voltage and reducing flickering and ripples.
Implementation Method 1
The use of transparent conductive materials for common and pixel electrodes
Implementation Method 2
an in-plane switching (IPS) mode LCD, in which liquid crystal molecules are driven in a horizontal direction to the substrates to thereby improve the viewing angle
Data Source
AI summary
A method for fabricating an in-plane switching (IPS) type liquid crystal display (LCD) device according to an embodiment includes forming gate lines arranged in a first direction and data lines arranged in a second direction substantially perpendicular to the first direction, the gate lines and the data lines defining pixel regions on an array substrate; forming a storage electrode on the array substrate; forming common electrodes extending across each pixel region; forming pixel electrodes arranged to be substantially parallel to the common electrodes, the common electrodes and the pixel electrodes being alternately arranged to generate an in-plane field in each pixel region; and forming thin film transistors (TFTs) at intersection areas of the gate lines and the data lines, each TFT including a source electrode connected to the corresponding data line, a drain electrode connected to the corresponding pixel electrode and a gate electrode.