Transparent Electrode Storage Capacitance for Display Transmittance
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Solution Overview
Problem
Conventional liquid crystal display devices face a trade-off between minimizing flicker and maintaining high transmittance, as enlarging the storage capacitance area to reduce flicker necessitates the use of non-transparent metal lines, which obstruct light penetration.
Innovation Solution
The design replaces the non-transparent storage capacitance line with transparent bottom and top electrodes, formed from materials like ITO, allowing for the omission of the metal Cst line and enabling larger storage capacitance without compromising transmittance, by positioning the bottom electrode under the passivation layer and the top electrode correspondingly to form the storage capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the storage capacitance area is enlarged to minimize flicker, then the flicker level becomes lower, but the transmittance of the liquid crystal display becomes low due to the non-transparent Cst line
Solution Approach 1:
The patent changes the material parameter of the storage capacitance electrode from non-transparent metal to transparent conductive material (such as ITO), enabling the electrode to be both functional and transparent. This parameter change allows the storage capacitance area to be enlarged for flicker reduction while maintaining high transmittance, as the transparent electrode material does not obstruct light penetration.
Solution Approach 2:
The patent employs composite material structure by using transparent conductive oxide materials (like ITO) instead of traditional metal materials for the storage capacitance electrode. This material substitution creates a composite solution that combines the electrical functionality of metal electrodes with the optical transparency of oxide materials, thereby resolving the contradiction between flicker reduction and transmittance maintenance.
2Reliability
If a large Cst area is required to minimize flicker, then the flicker phenomenon is reduced, but the transmittance unavoidably becomes low due to the metal Cst line obstruction
Solution Approach 1:
The patent changes the optical parameter of the storage capacitance electrode from opaque to transparent by substituting metal material with transparent conductive oxide material. This parameter change enables the electrode to maintain its electrical storage function while allowing light to pass through, thus achieving both flicker reduction through adequate Cst area and high transmittance simultaneously.
Solution Approach 2:
The patent substitutes the traditional metal-based electrical component with a transparent conductive material-based component. This substitution replaces the conventional metal electrode system with a transparent electrode system that performs the same electrical storage function while having superior optical properties, thereby eliminating the trade-off between reliability and illumination intensity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a significant improvement in transmittance, potentially exceeding 40% while effectively reducing flicker levels, as the transparent electrodes allow greater light penetration and maintain sufficient storage capacitance.
Implementation Method 1
the bottom electrode is also transparent and can be formed by the same material as the top electrode, such as ITO... the transparent electrodes allow greater light penetration
Implementation Method 2
The top electrode is formed on the second passivation layer at a position corresponding to the bottom electrode to form a storage capacitance
Data Source
AI summary
A display device is disclosed. According to the present invention, the display device comprises a bottom substrate, a plurality of interlayers, a first passivation layer, a bottom electrode, a second passivation layer, a top electrode and a top substrate. The interlayers are formed on the bottom substrate, including a patterned polysilicon layer, a data line and a gate line disposed therein. The first passivation layer is formed on the interlayers. The bottom electrode is formed on the first passivation layer. The second passivation layer is formed to cover the bottom electrode. The top electrode is formed on the second passivation layer at a position corresponding to the bottom electrode to form a storage capacitance.