Transparent Interconnect for Multi-Die SoC Address Mapping
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Solution Overview
Problem
Current multi SoC systems face challenges in inter-die communication due to non-transparent access interfaces, leading to address re-mapping requirements and incompatibility between SoCs with different fabrication technologies, which complicates communication and resource management in safety-critical applications like automotive systems.
Innovation Solution
A scalable multi-core system-on-chip architecture with a transparent interconnect that enables consistent system address mapping across multiple dice, allowing seamless communication between SoCs with unique and non-overlapping addresses, facilitating communication without re-mapping or re-directing addresses, and supporting different fabrication technologies and processing speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple independent SoCs are mounted stacked and connected via serial or parallel interfaces, then inter-die communication is enabled, but address re-mapping is required and system complexity increases
Solution Approach 1:
The patent introduces a transparent interconnect as an intermediary component that mediates communication between multiple SoCs. This interconnect provides a unified address space that allows direct access to resources across SoC boundaries without requiring address re-mapping, thereby reducing system complexity while maintaining communication reliability
Solution Approach 2:
The transparent interconnect serves multiple functions: it enables inter-die communication, provides unified address mapping, and supports resource sharing across multiple SoCs. This multi-functional approach eliminates the need for separate address mapping mechanisms for each SoC interface
2Adaptability or versatility
If SoCs with different fabrication technologies are integrated, then technology compatibility is improved, but interface incompatibility arises
Solution Approach 1:
The patent creates a homogeneous communication environment through the transparent interconnect, which standardizes the interface protocol and address mapping mechanism. This allows SoCs fabricated with different technologies to communicate through a unified interface, eliminating interface incompatibility issues
3Productivity
If transparent address access is implemented across multiple SoCs, then communication efficiency is improved, but system architecture complexity increases
Solution Approach 1:
The patent merges the address spaces of multiple independent SoCs into a single unified address space through the transparent interconnect. This consolidation allows efficient direct access to resources across SoC boundaries while the interconnect handles the complexity of coordinating multiple address mappings internally
Data Source
AI summary
A system for a multiple chip architecture that enables different system on-chip (SoC) systems with varying compatibilities to interact as one SoC via a transparent interface. The system address maps of the single SoCs are configured so that each provide a system address map of the two SoCs without overlap or address re-mapping when connected to one another via the transparent interface. The transparent interface enables components related to safety/security and interrupt communication of a first and second SoC within the multiple chip system to transparently communicate and interact. The transparent interface can enable sources of both SoCs to be flexibly mapped to interrupt services providers on the first/second SoC within the multiple chip system.