Transparent Substrate Wafer Alignment Patterning
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Solution Overview
Problem
Existing semiconductor device manufacturing methods face challenges in achieving accurate positioning and patterning due to issues with resist application and alignment, particularly when using the TAIKO technique, which can lead to cracking or breaking of the semiconductor wafer, and the WSS technique requires expensive special exposure apparatuses.
Innovation Solution
A method involving the attachment of a transparent supporting substrate to the semiconductor wafer using a transparent adhesive, allowing for accurate alignment and patterning through visible light observation, eliminating the need for rib portions and reducing manufacturing costs by using a general exposure apparatus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thickness of the semiconductor wafer is reduced to reduce energy loss or improve radiation performance, then energy efficiency and radiation performance are improved, but the wafer becomes prone to breaking or cracking
Solution Approach 1:
The wafer is segmented into a thin central processing area and a thicker outer circumferential reinforcing portion (rib portion), allowing the central area to be thin for reduced energy loss while the outer portion maintains structural integrity to prevent breaking or cracking
Solution Approach 2:
Different regions of the wafer are given different thicknesses - the central portion is thinned for performance optimization while the outer circumferential end maintains greater thickness as a reinforcing portion, creating local quality variations that simultaneously achieve energy efficiency and structural reliability
2Loss of energy
If the TAIKO technique is used to reduce wafer thickness, then energy loss is reduced, but resist application becomes non-uniform and patterning accuracy deteriorates
Solution Approach 1:
A supporting substrate is attached to the rear surface of the wafer before resist application and patterning processes. This preliminary support action maintains wafer flatness and provides a stable base, enabling uniform resist coating and accurate patterning even when the wafer is thinned using the TAIKO technique
Solution Approach 2:
A supporting substrate acts as an intermediary between the thin wafer and the processing equipment. This intermediary provides mechanical support and flatness during resist application and exposure processes, resolving the conflict between reduced wafer thickness and manufacturing precision
3Strength
If the WSS technique is used to reinforce the wafer, then wafer strength is improved, but special expensive exposure apparatus is required
Solution Approach 1:
A supporting substrate serves as a mediator that reinforces the wafer strength during processing. This approach enables the use of standard, cost-effective exposure apparatus rather than requiring complex special-purpose equipment, as the supporting substrate provides the necessary mechanical reinforcement
Solution Approach 2:
The supporting substrate is a temporary, removable component that provides reinforcement only during critical processing steps. After processing, it can be removed, allowing the use of simpler, more affordable exposure apparatus rather than investing in expensive permanent wafer reinforcement systems
4Strength
If the outer circumferential end is made into a rib portion, then wafer strength is improved, but resist application uniformity deteriorates and thick resist portions remain after development
Solution Approach 1:
The supporting substrate acts as an intermediary that compensates for the surface irregularities caused by the rib portion. It provides a flat working surface that enables uniform resist application across the entire wafer surface, including over the outer circumferential rib portion, eliminating thick resist portions that would remain after development
Solution Approach 2:
The supporting substrate is attached before resist application to preliminarily establish a flat surface. This preliminary action ensures that subsequent resist coating is uniform across the entire wafer surface, preventing the formation of thick resist portions over the rib structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves patterning accuracy, prevents wafer breaking or cracking, and reduces manufacturing costs by enabling the use of standard exposure equipment.
Implementation Method 1
attaching a supporting substrate (12) to a front surface of the semiconductor wafer (1) by means of a transparent adhesive (11)
Implementation Method 2
a supporting substrate (12) which has such transparency that the front surface of the semiconductor wafer (1) is seen and is attached to the front surface of the semiconductor wafer (1) by means of a transparent adhesive (11) having such transparency that the front surface of the semiconductor wafer (1) is seen
Data Source
Figure 1~3
Figure 4~5
Figure 6~7
AI summary
A circuit pattern of a front surface structure (2) is formed in a front surface of a semiconductor wafer (1) and an alignment mark (3) is formed on the front surface of a semiconductor wafer (1). Then, a transparent supporting substrate (12) is attached to the front surface of the semiconductor wafer (1) by a transparent adhesive (11). Then, a resist (13) is applied onto a rear surface of the semiconductor wafer (1). Then, the semiconductor wafer (1) is mounted on a stage (21) of an exposure apparatus, with the supporting substrate (12) down. Then, the alignment mark (3) formed on the front surface of the semiconductor wafer (1) is recognized by a camera (22) which is provided below the stage (21) through the supporting substrate (12) and the adhesive (11) from the lower side of the stage (21) and the positions of the semiconductor wafer (1) and a photomask (24) are aligned with each other. Then, the resist (13) is patterned. Then, a circuit pattern of a rear surface structure is formed in the rear surface of the semiconductor wafer (1) using the resist (13) as a mask.