Trapped-Ion Quantum Circuits with Parallel Entangling Gates

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Solution Overview

Problem

Existing quantum computing architectures lack efficient methods for parallel processing, leading to longer computation times due to the sequential execution of single-qubit and two-qubit gates, hindering the full potential of quantum computers.

Innovation Solution

Implementing efficient arbitrary simultaneous entangling (EASE) gates in ion trap quantum computers, utilizing a classical computer to compute circuits, a system controller to execute these gates on a quantum processor, and measuring qubit states to output results, thereby enabling parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If sequential execution of universal gates is used, then implementation simplicity is maintained, but computation time increases

Engineering Contradiction:
Improvecomputation timeVSAvoidgate execution complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent merges multiple two-qubit gate operations into a single simultaneous entangling gate operation. Instead of executing gates g1, g2, g3, g4 sequentially, the system applies all entangling operations simultaneously using a unified gate structure, reducing the number of execution steps while maintaining the computational functionality of individual gates

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the quantum circuit into distinct layers: single-qubit gate layer and simultaneous entangling gate layer. This segmentation allows independent optimization of each layer, with single-qubit gates prepared in advance and entangling gates executed simultaneously, improving overall circuit execution efficiency

Inventive Principle:
Principle #1Segmentation

2Productivity

If parallel processing is implemented, then computation efficiency improves, but control system complexity increases

Engineering Contradiction:
Improvecomputation efficiencyVSAvoidcontrol system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system performs preliminary preparation of single-qubit gates before the simultaneous entangling gate operation. By pre-configuring all single-qubit gate parameters and states, the control system only needs to manage the simultaneous execution of entangling gates, significantly reducing real-time control complexity while maintaining parallel processing efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs a universal simultaneous entangling gate structure that can perform multiple two-qubit entangling operations through a single unified mechanism. This multi-functional gate can implement various entangling operations (CNOT, CZ, SWAP, etc.) by adjusting parameters, reducing the need for multiple specialized control circuits

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12353957B2Quantum circuit construction with simultaneously entangling gates in trapped-ion quantum computers
Publication Date: 2025.07.08 IONQ INC
  • US12353957B2 patent drawing
  • US12353957B2 patent drawing
  • US12353957B2 patent drawing

AI summary

A method of performing computation using an ion trap quantum computing system including a classical computer, a system controller, and a quantum processor includes computing, by the classical computer, a circuit that implements a selected set of gate operations, using one or more efficient arbitrary simultaneous entangling (EASE) gates, implementing, by the system controller, the computed circuit on the quantum processor, measuring, by the system controller, population of qubit states in the quantum processor, and outputting, by the classical computer, the measured population of qubit states in the quantum processor.