Tree Structure High-Speed Serial Bus Image Data Transfer

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Solution Overview

Problem

Conventional image processing systems, such as digital multifunction products, face limitations in data transfer speed due to the use of parallel PCI buses, which restrict high-speed data transfer and require significant bandwidth, leading to reduced productivity and increased system costs.

Innovation Solution

Implementing a tree structure with high-speed serial buses for point-to-point data transfer between units, including a controlling unit, image processing units, and a storage unit, as per the PCI Express standard, to enhance data transfer efficiency and reduce bandwidth requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If parallel PCI bus is used for data transfer between units, then system compatibility and ease of implementation are improved, but data transfer speed and bandwidth are restricted

Engineering Contradiction:
Improveease of implementationVSAvoiddata transfer speed
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent replaces the parallel PCI bus mechanism with a high-speed serial bus mechanism. Specifically, it uses a serial advanced technology attachment (SATA) bus or a fiber channel (FC) bus to connect the host bus bridge to storage devices, replacing the traditional parallel interface. This substitution enables significantly higher data transfer speeds while maintaining system compatibility through standard interface protocols.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of manufacture

If parallel PCI bus is used for data transfer, then system cost is reduced, but bandwidth requirement increases leading to reduced productivity

Engineering Contradiction:
Improvesystem costVSAvoiddata transfer efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent changes the fundamental parameters of the data transfer interface by transitioning from parallel to serial communication. This parameter change includes altering the signal transmission method, clock frequency, and data encoding schemes. The high-speed serial bus operates at significantly higher frequencies with more efficient data encoding, thereby increasing bandwidth and productivity without proportionally increasing system cost.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If distributed storage units are implemented to increase bandwidth, then data transfer capacity is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvebandwidth capacityVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the storage system into distinct functional units: a host bus bridge for interface control, individual storage devices for data storage, and a backplane for signal routing. This segmentation allows each component to be optimized independently and connected through standardized high-speed serial interfaces, achieving high bandwidth capacity without requiring complex distributed storage architectures.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8606977B2System controlling device and image processing system
Publication Date: 2013.12.10 RICOH CO LTD
  • US8606977B2 patent drawing
  • US8606977B2 patent drawing
  • US8606977B2 patent drawing

AI summary

A system controlling device having a tree structure includes a data controlling unit that functions as a root device. The data controlling unit is connected to a first image processing unit and a second image processing unit by separate high-speed serial buses. The first image processing unit performs image processing on image data scanned by a scanner, while the second image processing unit performs image processing on image data to be output to a printer. A storage unit is independently connected to the data controlling unit and stores therein image data processed by the first image processing unit and the second image processing unit.