Tail-Biting Trellis LDPC Encoding Without Parity Matrix Storage
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Solution Overview
Problem
Existing error correction codes, such as LDPC codes, face complexity in encoding due to the need for memory-intensive parity check matrix storage and dense matrix operations, which increases computational load and power consumption, making them costly and inefficient for small block sizes and practical implementations.
Innovation Solution
The method involves partitioning a base code trellis into intersecting regular parts representing parity check equations, arranging data bits along a two-state trellis with pre-determined permutation rules, and recovering redundancy data bits successively, eliminating the need for storing the parity check matrix and reducing connectivity, thus decreasing memory and computational requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parity check matrix storage and dense matrix operations are used for LDPC encoding, then error correction capability is improved, but memory requirements and computational complexity increase
Solution Approach 1:
The base code trellis is partitioned into multiple intersecting regular parts, each representing a subset of parity check equations. This segmentation allows the encoding process to be divided into smaller, more manageable steps that can be executed sequentially with reduced computational complexity at each stage.
Solution Approach 2:
Data bits are arranged along the two-state trellis with pre-determined permutation rules before the actual encoding computation. This preliminary arrangement optimizes the structure of the trellis to facilitate more efficient recovery of redundancy bits and reduces the complexity of subsequent operations.
2Measurement precision
If parity check matrix storage is used for LDPC encoding, then encoding accuracy is improved, but memory consumption increases
Solution Approach 1:
The patent extracts and eliminates the need to store the complete parity check matrix by using a two-state trellis representation. The trellis structure inherently encodes the necessary parity check relationships without requiring explicit storage of the full matrix, significantly reducing memory requirements.
Solution Approach 2:
The patent transitions from a traditional matrix-based representation (2D array requiring O(n*p) storage) to a trellis-based representation that uses a different structural dimension. The two-state trellis with pre-determined permutations provides the same encoding functionality with reduced memory footprint by exploiting the temporal and structural relationships in the code.
3Reliability
If dense matrix operations are performed for encoding, then code reliability is improved, but power consumption increases
Solution Approach 1:
The encoding process is segmented into sequential steps where redundancy bits are recovered one regular part at a time. This segmentation reduces the computational workload at each step, leading to lower power consumption compared to performing dense matrix operations on the entire parity check matrix simultaneously.
Solution Approach 2:
The patent employs a dynamic encoding approach where the computation adapts to the specific structure of the trellis and the positions of information and parity bits. This dynamic method avoids unnecessary computations inherent in static dense matrix operations, reducing power consumption while maintaining encoding accuracy.
4Reliability
If traditional LDPC encoding methods are used, then error correction performance is improved, but encoding speed decreases
Solution Approach 1:
By partitioning the base code trellis into regular parts and recovering redundancy bits sequentially, the patent enables a more efficient encoding process that avoids the computational bottlenecks of traditional methods. This segmented approach maintains error correction performance while significantly improving encoding speed.
Solution Approach 2:
The pre-determined permutation rules and preliminary arrangement of data bits along the trellis create an optimized structure that facilitates faster encoding. This preliminary preparation reduces the computational complexity during the actual encoding phase, thereby increasing encoding speed without sacrificing performance.
Data Source
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AI summary
Encoding method ( I ) and device associating p redundancy data bits with Ic information data bits to determine code words with a block length of n = p+k data bits. The code words are of tail-biting trellis low density parity check type. The method and the device implement a degree distribution profile of the n data bits defining a base code word including multiple replicas of the n data bits with respect to the degree distribution. This base code is represented by a two- states trellis formed of sections with positions accommodating data bits of the base code whereby the number of positions of a section is denoted as the degree of the section. The method and the device makes (2) a partition of the base code trellis into p intersecting regular parts of triple sections representing p parity check equations.