Trellis State Reduction Using Control-Bit A Priori Knowledge

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Solution Overview

Problem

Current decoding techniques in mobile communication systems, particularly in LTE D2D side link communication, face challenges in improving coding sensitivity due to the high number of trellis states, which can lead to inefficiencies in error correction and decoding accuracy, especially under low SINR conditions.

Innovation Solution

The proposed decoding device and method utilize context redundancy information to reduce the number of trellis states by identifying and removing invalid or unreachable states based on self-context and cross-context redundancy, thereby enhancing decoding sensitivity and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of trellis states is increased to improve error correction capability, then decoding reliability is improved, but device complexity and computational power consumption increase

Engineering Contradiction:
Improvedecoding reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes invalid or unreachable trellis states from the decoding process by utilizing context redundancy information. This selective removal reduces the number of states that need to be processed while maintaining the integrity of valid decoding paths, thereby reducing device complexity without sacrificing decoding reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary identification and marking of invalid trellis states before the actual decoding process. By pre-processing the trellis structure to eliminate impossible states based on context redundancy, the system reduces computational complexity in advance while preserving all necessary valid decoding paths for reliable error correction

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the number of trellis states is increased to improve error correction capability, then decoding reliability is improved, but computational power consumption increases

Engineering Contradiction:
Improvedecoding reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates unreachable trellis states that would otherwise consume computational resources during decoding. By removing these invalid states using context redundancy information, the system reduces the computational workload and associated power consumption while maintaining sufficient error correction capability through the remaining valid states

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If context redundancy information is utilized to reduce trellis states, then decoding sensitivity is improved, but device complexity increases

Engineering Contradiction:
Improvedecoding sensitivityVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary analysis of context redundancy information to identify invalid trellis states before decoding. This pre-processing step enables the system to achieve improved decoding sensitivity by focusing computational resources on valid states, while the complexity of analyzing context redundancy is offset by the subsequent reduction in decoding complexity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3273604B1Trellis decoding with trellis state reduction based on a-priori knowledge of control channel bits
Publication Date: 2019.10.16 INTEL IP CORP
  • EP3273604B1 patent drawingFigure 1
  • EP3273604B1 patent drawingFigure 2
  • EP3273604B1 patent drawingFigure 3

AI summary

The disclosure relates to a decoding device, comprising: a receiver configured to provide a sequence of information bits comprising context redundancy information, wherein the sequence of information bits is encoded based on a predefined channel code; a trellis generation logic configured to generate a plurality of trellis states based on the sequence of information bits and the channel code; a trellis reduction logic configured to reduce the plurality of trellis states by at least one trellis state based on the context redundancy information; and a decoder configured to decode the sequence of information bits by using a metric based on the reduced number of trellis states.