Trench Semiconductor Structure With Air Gap for Lower Parasitic Capacitance

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing parasitic capacitance and current leakage as they become more integrated, leading to increased RC delay and interference with normal transistor operation.

Innovation Solution

A semiconductor device is fabricated with a trench structure that includes a gate insulating layer, gate electrode, and air gap formation, reducing parasitic capacitance and current leakage by interposing an air gap between the semiconductor layer and substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are miniaturized and highly integrated, then device density and integration level improve, but parasitic capacitance and current leakage increase

Engineering Contradiction:
Improvedevice integration levelVSAvoidparasitic capacitance
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the harmful semiconductor substrate material from the region beneath the transistor channel by forming an air gap. This removes the source of parasitic capacitance and current leakage while maintaining the transistor's functional structure, directly resolving the contradiction between high integration and parasitic effects

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a vertical air gap dimension between the semiconductor layer and substrate, transitioning from a traditional planar contact structure to a suspended structure. This dimensional change eliminates parasitic capacitance pathways while allowing continued horizontal integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If semiconductor devices are miniaturized and highly integrated, then device density improves, but RC delay increases

Engineering Contradiction:
Improvedevice integration levelVSAvoidRC delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By extracting the substrate material from beneath the channel region and replacing it with an air gap, the patent removes the high-dielectric-constant substrate that contributes to RC delay. This reduces the capacitive load on transistor gates, thereby decreasing RC delay while maintaining device integration

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If semiconductor devices are miniaturized and highly integrated, then device density improves, but current leakage increases

Engineering Contradiction:
Improvedevice integration levelVSAvoidcurrent leakage
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the conductive substrate material from the region beneath the transistor channel and replaces it with an insulating air gap. This eliminates the substrate-induced current leakage pathways while preserving the transistor's source-drain channel functionality and enabling higher device integration

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces parasitic capacitance and current leakage, improving the operating characteristics of transistors by minimizing RC delay and ensuring normal operation.

Implementation Method 1

parasitic capacitance and current leakage, leading to increased RC delay

Methodology Applied
Scientific EffectParasitic capacitance: Capacitance

Implementation Method 2

parasitic capacitance and current leakage

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Data Source

PatentUS12368071B2Semiconductor device and method for fabricating the same
Publication Date: 2025.07.22 SK HYNIX INC
  • US12368071B2 patent drawing
  • US12368071B2 patent drawing
  • US12368071B2 patent drawing

AI summary

A semiconductor device includes: a semiconductor layer, a gate insulating layer, and a gate electrode sequentially formed in a trench formed to a predetermined depth from a first surface of a first substrate; a third substrate bonded to a second surface opposite to the first surface of the first substrate; and an air gap interposed between the semiconductor layer and the first substrate and between the semiconductor layer and the third substrate.