Trench Alignment Structures for Semiconductor Overlay Accuracy

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Solution Overview

Problem

As semiconductor devices continue to shrink in size, challenges arise in maintaining alignment accuracy during lithography processes, leading to registration and overlay errors that can damage or destroy alignment structures during the singulation process, affecting the integrity of semiconductor components.

Innovation Solution

The formation of alignment structures with trenches in the substrate, using anisotropic etching to create precise patterns, followed by conformal deposition of thin semiconductor layers that allow for accurate measurement and alignment of photomasks, thereby reducing overlay errors and preserving alignment marks throughout the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but alignment accuracy during lithography deteriorates leading to registration and overlay errors

Engineering Contradiction:

Improveintegration densityVSAvoidalignment accuracy

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces alignment structures with trenches as intermediary reference features that facilitate accurate photomask alignment. These trench structures serve as mediators between the lithography system and the shrinking feature sizes, providing stable reference points for overlay measurement and correction, thereby maintaining alignment accuracy despite reduced minimum feature dimensions

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of alignment structures by creating trenches with specific depth, width, and material composition. By adjusting these parameters, the alignment structures provide enhanced contrast and measurement precision for overlay detection, enabling accurate alignment even as device feature sizes are reduced to improve integration density

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If conventional alignment structures are used, then the lithography process can proceed, but the alignment structures are damaged or destroyed during the singulation process

Engineering Contradiction:

Improvelithography processabilityVSAvoidalignment structure integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by creating trenches with specific material properties and geometric characteristics that differ from the surrounding substrate. These localized trench structures provide enhanced mechanical strength and damage resistance at the alignment mark locations, while the rest of the device structure maintains its original properties for normal device operation

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The alignment structures with trenches are formed preliminarily before the singulation process. The trench structures are created with sufficient depth and structural reinforcement in advance, so that when singulation occurs later, the pre-strengthened alignment marks resist damage and preserve their integrity throughout the manufacturing process

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances alignment accuracy by allowing precise measurement of trench profiles and overlay positions, ensuring that alignment structures are not damaged during singulation and maintaining the integrity of semiconductor components, thus supporting the continued miniaturization of semiconductor devices.

Implementation Method 1

forming a plurality of trenches in the first region of the substrate

Methodology Applied

Scientific EffectAnisotropic etching:

Implementation Method 2

conformal deposition of thin semiconductor layers

Methodology Applied

Scientific EffectConformal deposition: Deposition (physical)

Data Source

PatentUS12406938B2Methods of forming alignment structure with trenches for semiconductor devices

Publication Date: 2025.09.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of forming a semiconductor device is provided. The method includes providing a substrate having a first region and a second region; forming a plurality of trenches in the first region of the substrate; forming a multi-layer stack over the substrate and in the trenches; and patterning the multi-layer stack and the substrate to form first nanostructures over first fins in the first region and second nanostructures over second fins in the second region, where the multi-layer stack includes at least one of first semiconductor layers and at least one of second semiconductor layer stacked alternately, and the plurality of trenches are in corresponding ones of the first fins.