Trench Buffer Epitaxy for Dislocation Trapping
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Solution Overview
Problem
Current methods for producing semiconductor devices with high mobility materials like carbon, germanium, and III-V alloys on silicon substrates face challenges due to lattice parameter mismatches, leading to high dislocation densities and limitations in miniaturization, especially with the use of continuous epitaxial layers.
Innovation Solution
A method involving the growth of crystalline epitaxial layers laterally on a buffer layer formed in trenches within a masking layer, which traps dislocations below the masking layer, allowing for the formation of high-quality channels with reduced defects and increased critical thickness, enabling the production of devices like FinFET transistors with improved density and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous epitaxial layers are grown on silicon substrates to achieve high mobility materials, then device performance is improved, but dislocation density increases due to lattice parameter mismatch
Solution Approach 1:
The patent divides the substrate into isolated trenches separated by masking regions. Each trench contains a buffer layer and epitaxial layer, creating segmented structures that prevent dislocation propagation between trenches. This segmentation allows high mobility materials to be grown with reduced dislocation density while maintaining device performance.
Solution Approach 2:
The patent creates different structural regions: trenches for epitaxial growth and masking regions for dislocation trapping. The local quality varies spatially - trenches provide controlled growth environments with specific aspect ratios optimized for minimizing dislocations, while masking regions serve as sacrificial dislocation sinks. This local differentiation resolves the contradiction between achieving high material quality and managing lattice mismatch.
2Manufacturing precision
If thick buffer layers are used to reduce dislocation density in hetero-epitaxied layers, then manufacturing cost increases, but dislocation density decreases
Solution Approach 1:
The patent transitions from two-dimensional continuous layers to three-dimensional trench structures with specific aspect ratios. By controlling the depth-to-width ratio of trenches, the method achieves dislocation trapping and material quality improvement through geometric confinement rather than relying solely on increasing buffer layer thickness. This dimensional approach reduces material consumption and manufacturing cost while maintaining low dislocation density.
3Manufacturing precision
If aspect ratio trapping is used to confine dislocations in trenches, then masking layer thickness must be greater than trench width, but device density is reduced
Solution Approach 1:
The patent optimizes the aspect ratio parameter of trenches (depth/width ratio) to achieve effective dislocation confinement. By carefully selecting specific aspect ratio values, the method satisfies the trapping condition while minimizing the lateral space occupied by each trench structure. This parameter optimization allows higher device density within the same substrate area compared to conventional approaches requiring thicker masking layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in semiconductor devices with reduced crystalline defects, enabling the formation of strained epitaxial layers beyond the critical thickness, improving device performance and density without the limitations of traditional methods, and allowing for the production of high-quality channels for microelectronic devices.
Implementation Method 1
This principle is known in English under the term 'aspect ratio trapping' or 'dislocations necking' which could be translated into French as 'trapping by shape ratio'
Implementation Method 2
A method involving the growth of crystalline epitaxial layers laterally on a buffer layer formed in trenches
Implementation Method 3
this approach comes up against the strong lattice parameter disparity between the main materials of interest and silicon
Data Source
Figure 1a~1c
Figure 2a~2f
Figure 3a~3f
AI summary
The invention relates to a method of producing a crystalline layer from a crystalline substrate (100) in a first material on which a masking layer (200) has previously been deposited; said masking layer (200) comprising at least one trench forming an access to the substrate (100), characterized in that the trench has a depth at least equal to a value Hc such that Hc = KStan(θ) where K is at least greater than 0.7, S is the width of the trench and θ is the angle of the dislocations with respect to the plane of the substrate (100) and in that the process comprises the following steps: - formation of a crystalline buffer layer (300) located at least partly in the trench of the masking layer (200), extending from the substrate (100) and forming a projection beyond the masking layer (200) so that an upper part of the lateral flanks of said buffer layer (300) is left exposed,the formation step comprising growth of the buffer layer (300) from the substrate (100) so as to give the buffer layer (300) the crystalline structure of the crystalline substrate (100), - formation of a crystalline epitaxial layer (500) in a second material, different from the material of the buffer layer (300), by growth from said upper part of the lateral flanks of the buffer layer (300) left exposed, and the formation of the buffer layer (300) is carried out so as to leave an upper face of the buffer layer (300) exposed in addition to said upper part of the lateral flanks of the buffer layer (300) and in that, prior to the formation of the epitaxial layer (500), a protective layer (400) is formed on said upper face of the buffer layer (300) so as to leave only said upper part of the lateral flanks of the buffer layer (300) left exposed.