Trench Capacitor Auto-Doping Prevention via Undoped Polysilicon
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Solution Overview
Problem
Trench capacitors in DRAM devices suffer from auto-doping during the high-temperature isolation collar formation process, leading to parasitic leakage current and degraded device characteristics due to dopants diffusing into the substrate.
Innovation Solution
The method involves filling the trench with undoped polysilicon before forming the isolation collar, followed by doping the polysilicon after collar formation, and using a dielectric layer and oxide collar to prevent dopant diffusion, thereby avoiding auto-doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the trench is filled with doped polysilicon before forming the isolation collar, then the capacitor electrode is formed, but dopants diffuse into the substrate during high-temperature processing causing auto-doping and parasitic leakage current
Solution Approach 1:
The patent applies preliminary action by filling the trench with undoped polysilicon before forming the isolation collar, rather than using doped polysilicon. This preliminary choice of undoped material prevents dopant diffusion into the substrate during subsequent high-temperature processing steps, thereby avoiding auto-doping and the associated parasitic leakage current while still forming the capacitor electrode structure
Solution Approach 2:
The patent introduces an intermediary approach by using undoped polysilicon as a temporary material that serves as the capacitor electrode during isolation collar formation. This intermediary undoped polysilicon layer acts as a placeholder that prevents harmful dopant diffusion, and only after the isolation collar is formed does the polysilicon get doped to achieve the final conductive electrode, thus mediating between the need for early electrode formation and the need to prevent auto-doping
2Object-generated harmful factors
If the trench is filled with undoped polysilicon before forming the isolation collar, then auto-doping is prevented, but additional doping steps are required after collar formation
Solution Approach 1:
The patent applies preliminary action by performing the isolation collar formation while the polysilicon is still undoped, before the doping step. This sequencing of operations—filling with undoped polysilicon, forming the isolation collar, then doping—allows the harmful auto-doping to be prevented during the critical high-temperature collar formation process, while the necessary doping is performed as a subsequent step after the collar is in place to protect against further dopant diffusion
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents auto-doping, reducing parasitic leakage current and enhancing the performance characteristics of the trench capacitor by maintaining the substrate adjacent to the isolation collar free of unwanted dopants.
Implementation Method 1
depositing a dielectric layer on a sidewall of the trench; forming an isolation collar layer on the sidewall in the upper section of the trench
Implementation Method 2
filling the trench with a second layer of doped polysilicon
Data Source
AI summary
A trench capacitor with an isolation collar in a semiconductor substrate where the substrate adjacent to the isolation collar is free of dopants caused by auto-doping. The method of fabricating the trench capacitor includes the steps of forming a trench in the semiconductor substrate; depositing a dielectric layer on a sidewall of the trench; filling the trench with a first layer of undoped polysilicon; etching away the first layer of undoped polysilicon and the dielectric layer from an upper section of the trench whereby the semiconductor substrate is exposed at the sidewall in the upper section of the trench; forming an isolation collar layer on the sidewall in the upper section of the trench; and filling the trench with a second layer of doped polysilicon.