Trench Capacitor Floating Gate Coupling Ratio Enhancement
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Solution Overview
Problem
Current multiple time programmable (MTP) memory devices face challenges in increasing programming and erasing speeds while maintaining or reducing device size, as the coupling area between the floating gate and diffusion region is limited, affecting electrical characteristics.
Innovation Solution
The solution involves forming trenches within the diffusion region and depositing conductive material on the sidewalls of these trenches, thereby increasing the coupling area between the floating gate and diffusion region, enhancing the electrical characteristics and speeds of the programmable device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the feature size is reduced to increase device density, then the device size decreases, but the coupling area between floating gate and diffusion region is reduced, worsening the coupling ratio
Solution Approach 1:
The patent transitions from a planar coupling interface to a three-dimensional structure by forming trenches in the diffusion region and filling them with conductive material. This vertical dimensionality change increases the coupling surface area between the floating gate and diffusion region without increasing the planar footprint, thereby improving the coupling ratio while maintaining small device size
Solution Approach 2:
The conductive material is nested within the trenches formed in the diffusion region, creating a multi-layered structure where the floating gate couples with the diffusion region through both the top surface and the sidewalls of the trenches. This nested configuration maximizes the coupling area within a compact volume
2Speed
If the coupling area is increased to improve programming and erasing speeds, then the electrical characteristics improve, but the device size increases
Solution Approach 1:
By utilizing the vertical dimension through trench formation, the patent increases the coupling area available for charge storage and transfer without expanding the lateral device dimensions. This enables faster programming and erasing speeds while maintaining a compact device footprint suitable for high-density memory applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the coupling ratio, leading to increased programming and erasing speeds of the programmable device, while maintaining compatibility with existing manufacturing processes and being suitable for mass production.
Implementation Method 1
the trenches are deposited with the conductive material
Data Source
AI summary
A programmable device and a method of manufacturing the same are provided. A programmable device comprises a substrate having a source region, a drain region and a diffusion region adjacent to the source region and the drain region; a channel coupling the source region and the drain region; a floating gate formed of a conductive material and positioned on the substrate and corresponding to the channel; and a trench formed in the diffusion region at the substrate, wherein the floating gate extends to the trench, and the conductive material covers a sidewall of the trench.