Trench Capacitor Layout for Compact Low-Loss Superconducting Qubits
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Solution Overview
Problem
The challenge in scaling superconducting qubit devices for quantum computers is the large footprint of existing capacitor designs, which leads to increased microwave losses due to two-level-system defects, limiting coherence times and preventing the integration of millions of qubits on a chip.
Innovation Solution
A trench capacitor design with vertically arranged electrodes, where the first electrode is circumferentially enclosed by the second electrode, reduces the footprint while minimizing stray electric fields and crosstalk, using a crystalline silicon substrate and ultra-low loss dielectric materials to minimize defects and losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If planar capacitor design is used, then fabrication process is simple and post-processing is easy, but capacitor size must be much larger increasing footprint
Solution Approach 1:
The patent transitions from a planar (2D) capacitor design to a vertical (3D) trench capacitor design. The capacitor electrodes are arranged vertically within a trench structure, utilizing the third dimension (depth) to increase capacitance without increasing the lateral footprint. This dimensional change allows the capacitor to achieve the required capacitance value in a much smaller area while maintaining fabrication compatibility through vertical deposition processes.
Solution Approach 2:
The patent implements a nested structure where one electrode is positioned inside another electrode within the trench. The first electrode is circumferentially enclosed by the second electrode, creating a concentric nested arrangement. This nested configuration maximizes the electrode surface area within the confined trench volume, thereby increasing capacitance without requiring additional lateral space.
2Loss of energy
If capacitor size is increased to reduce electric field density, then energy loss through TLSs is reduced, but device footprint increases
Solution Approach 1:
The vertical trench configuration concentrates the electric field primarily within the trench volume rather than spreading it over a large planar area. By increasing the vertical dimension of the capacitor, the electric field density can be reduced for a given capacitance value, thereby minimizing coupling to two-level-system defects in the surrounding amorphous regions while maintaining a compact lateral footprint.
Solution Approach 2:
The patent employs a composite structure combining superconducting electrode materials with a crystalline dielectric material filling the trench. This composite configuration provides both the necessary capacitance and low loss characteristics, as the crystalline dielectric has fewer two-level-system defects compared to amorphous materials, thereby reducing energy loss while maintaining compact dimensions.
3Area of stationary object
If vertical trench structure is used, then footprint is reduced and electrode area is increased, but fabrication complexity increases
Solution Approach 1:
The vertical trench structure utilizes the depth dimension to increase electrode surface area while reducing lateral footprint. The trench is formed by etching vertically into the substrate, and electrodes are deposited conformally on the trench walls and bottom. This vertical arrangement provides large electrode area for high capacitance in a compact footprint, compatible with standard semiconductor fabrication processes.
Solution Approach 2:
The nested electrode configuration within the trench allows both electrodes to be formed using conformal deposition processes. The first electrode is deposited on the trench walls, followed by the second electrode that encloses the first. This nested structure can be fabricated using sequential conformal deposition and etch-back steps, which are extensions of standard fabrication techniques, thereby managing complexity while achieving the desired compact high-capacitance structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables a reduced footprint superconducting qubit device with minimized microwave losses, allowing for high-density circuitry and increased coherence times, facilitating the scaling of quantum computers.
Implementation Method 1
A superconducting material is deposited in the trench and a superconducting pad is formed on the frontside of the substrate
Implementation Method 2
superconducting material, such as Nb or Al
Data Source
Figure 1
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AI summary
The disclosure relates to a trench capacitor device (100) for a superconducting electronic circuit, comprising: a substrate (102); and a first capacitor electrode (104) and a second capacitor electrode (108), each of a superconductor and extending into the substrate, the first electrode being circumferentially enclosed by the second electrode such that an inwardly facing surface (108a) of the second electrode faces an outwardly facing surface (104a) of the first electrode.