Vertical Trench Capacitor Layout for Dense Superconducting Qubits
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Solution Overview
Problem
The large size of state-of-the-art superconducting qubits limits their scalability to millions on a chip, primarily due to microwave losses from two-level-system (TLS) defects at the capacitor interfaces, which increase with the size of the qubits.
Innovation Solution
A trench capacitor device is designed with superconducting electrodes extending into the substrate, where the first electrode is circumferentially enclosed by the second electrode, allowing for a vertical capacitor design that reduces the footprint while maintaining low microwave losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a planar capacitor design is used, then the fabrication process is simple and easy to manufacture, but the capacitor requires a much larger area footprint
Solution Approach 1:
The patent transitions from a planar (2D) capacitor design to a three-dimensional vertical trench capacitor design. The capacitor electrodes are arranged vertically within trenches etched into the substrate, utilizing the vertical dimension to increase capacitance density while reducing the horizontal footprint on the chip.
Solution Approach 2:
The patent employs a nested structure where one capacitor electrode is positioned inside another electrode within the same trench. This nested arrangement maximizes the use of vertical space and allows for increased capacitance within a compact footprint by effectively nesting functional elements within each other.
2Reliability
If the qubit size is increased to reduce microwave losses from TLS defects, then coherence time is improved, but scalability to millions of qubits on a chip is limited
Solution Approach 1:
By moving to a vertical trench capacitor design, the patent reduces the horizontal footprint of each qubit while maintaining the capacitor size needed for low TLS losses. This dimensional transition allows more qubits to be packed into the same chip area, enabling scalability to millions of qubits.
Solution Approach 2:
The patent changes the geometric parameters of the capacitor from a planar configuration to a vertical trench configuration with specific aspect ratios. This parameter change allows the capacitor to maintain sufficient surface area for low TLS losses while occupying less horizontal space, thereby increasing qubit density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The trench capacitor design enables a reduced footprint for superconducting qubit devices while minimizing microwave losses and crosstalk between adjacent circuitry, facilitating the creation of high-density quantum circuits.
Implementation Method 1
a first capacitor electrode and a second capacitor electrode, each a superconductor and extending into the substrate
Implementation Method 2
the first electrode being circumferentially enclosed by the second electrode such that an inwardly facing surface of the second electrode faces an outwardly facing surface of the first electrode
Data Source
AI summary
The disclosure relates to a trench capacitor device for a superconducting electronic circuit. The trench capacitor device includes a substrate, a first capacitor electrode, and a second capacitor electrode, each electrode including a superconductor and extending into the substrate. The first electrode is circumferentially enclosed by the second electrode such that an inwardly facing surface of the second electrode faces an outwardly facing surface of the first electrode.