Trench Capping Layer Protects High-k Gate Insulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuit manufacturing, high-k materials in gate insulation layers are prone to etching during cleaning processes, leading to functional issues due to misalignment and under-etching of contact holes through trench isolation structures, which can result in electrical shorts and device failure.
Innovation Solution
A semiconductor structure is developed with a trench capping layer made of a different insulating material, such as silicon nitride, that encapsulates the high-k gate insulation layer, along with a sidewall spacer, to protect it from cleaning agents and prevent unintended etching, thereby ensuring the integrity of the gate insulation layers and trench isolation structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a cleaning process is performed to remove contaminants from the semiconductor structure, then cleaning effectiveness is improved, but the high-k gate insulation layer is etched and damaged
Solution Approach 1:
A silicon nitride layer is introduced as an intermediary protective barrier between the cleaning agent and the high-k gate insulation layer. The silicon nitride layer is selectively removed after cleaning using a specific etchant that does not affect the high-k material, thus protecting the gate insulation during cleaning while allowing effective contaminant removal
Solution Approach 2:
The silicon nitride layer is deposited on the high-k gate insulation layer before the cleaning process. This preliminary protective action ensures that the high-k material is shielded from etching during subsequent cleaning steps, allowing the cleaning process to proceed without damaging the gate insulation
2Reliability
If contact holes are etched through the interlayer dielectric to provide electrical connections, then electrical connectivity is improved, but misalignment causes etching through the trench isolation structure and electrical shorts
Solution Approach 1:
The silicon nitride trench capping layer is formed over the trench isolation structure before contact hole etching. This layer acts as a cushioning protective barrier that prevents etching through the trench isolation structure even if contact holes are misaligned, thereby preventing electrical shorts while allowing electrical connectivity to be established
3Adaptability or versatility
If the gate structure overlaps with the trench isolation structure, then device layout flexibility is improved, but the gate insulation layer becomes vulnerable to cleaning agent etching
Solution Approach 1:
The silicon nitride layer serves as an intermediary protective layer specifically at the overlap region where the gate structure meets the trench isolation structure. This intermediary layer prevents cleaning agents from etching the high-k gate insulation layer in the vulnerable overlap region while maintaining the desired layout flexibility
Data Source
AI summary
A semiconductor structure includes a trench isolation structure and a trench capping layer positioned over the trench isolation structure, wherein the trench isolation layer includes a first electrically insulating material and the trench capping layer includes a second electrically insulating material that is different from the first electrically insulating material. The semiconductor structure also includes a gate structure having a gate insulation layer and a gate electrode positioned over the gate insulation layer, wherein the gate insulation layer includes a high-k material and the gate structure includes a first portion that is positioned over the trench capping layer. A sidewall spacer is positioned adjacent to the gate structure, wherein a portion of the sidewall spacer is positioned on the trench capping layer and contacts the trench capping layer laterally of the gate insulation layer.