Trench Conductive Layer Formation to Prevent Word-Line Collapse
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is to achieve improved performance, quality, yield, and reliability in package-on-package stacking technology, while minimizing package size and ensuring flexible interconnect geometry compatible with pick-and-place and molding processes.
Innovation Solution
A method of forming a semiconductor structure involves forming trenches in a substrate, depositing a bottom conductive layer at a low temperature of 350° C. to 450° C., followed by an annealing process at a higher temperature to reduce resistivity, and then forming a top conductive layer in recesses created by removing a portion of the bottom conductive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the bottom conductive layer is deposited at a high temperature to improve adhesion, then adhesion is improved, but word-line wiggling or collapse occurs
Solution Approach 1:
The patent changes the deposition temperature parameter to a low temperature range (350°C to 450°C) to prevent word-line wiggling or collapse while maintaining adhesion. This parameter optimization resolves the contradiction between adhesion strength and structural stability.
2Volume of moving object
If the trench width is reduced to improve device miniaturization, then device size is reduced, but manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent optimizes the deposition temperature parameter (350°C to 450°C) to enable precise control of the bottom conductive layer thickness and trench filling, allowing narrow trench widths (12 nm to 30 nm) to be manufactured with high precision without word-line defects.
3Reliability
If the annealing temperature is increased to reduce resistivity, then electrical performance is improved, but energy consumption increases
Solution Approach 1:
The patent optimizes the annealing temperature to a specific range (470°C to 650°C) that achieves sufficient resistivity reduction for improved electrical performance while minimizing energy consumption. This balanced parameter selection resolves the contradiction between electrical performance and energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method prevents word-line wiggling or collapse, even with narrow trenches and small protruding portions, by ensuring low deposition temperature and effective annealing, thereby improving electrical performance and structural stability.
Implementation Method 1
A bottom conductive layer is deposited on the dielectric layer and in the trench at a first temperature of 350° C. to 450° C.
Implementation Method 2
An annealing process is performed on the bottom conductive layer at a second temperature greater than or equal to 470° C.
Implementation Method 3
A top conductive layer is formed in the recess.
Data Source
AI summary
A method of forming a semiconductor structure includes the following operations. A trench is formed in a substrate. A dielectric layer is formed to cover an inner surface of the trench. A bottom conductive layer is deposited on the dielectric layer and in the trench at a first temperature of 350° C. to 450° C. An annealing process is performed on the bottom conductive layer at a second temperature greater than or equal to 470° C. A portion of the bottom conductive layer is removed to form a recess on the bottom conductive layer and in the trench. A top conductive layer is formed in the recess.