Trench Contact Structure With Low-k Etch Stop for Lower Capacitance
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Solution Overview
Problem
The scaling of multi-gate transistors to smaller dimensions and increased densities poses challenges due to overwhelming constraints on semiconductor processes, particularly in reducing parasitic capacitance which limits device performance.
Innovation Solution
The use of an etch-stop material for trench contact etch processing, specifically a low-k etch stop layer, to confine the trench contact opening and reduce the amount of tungsten fill, thereby minimizing capacitance at the transistor level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate transistors are scaled to smaller dimensions with increased density, then device capacity and functional unit density are improved, but parasitic capacitance increases and process constraints become overwhelming
Solution Approach 1:
The patent applies local quality by using different dielectric materials with different k-values in different regions. Specifically, a first dielectric material with a first k-value is used in a first region, and a second dielectric material with a second k-value (lower than the first) is used in a second region adjacent to the transistor. This local differentiation allows the structure to maintain high device capacity while reducing parasitic capacitance in the critical region near the transistor.
Solution Approach 2:
The patent changes the dielectric parameter (k-value) to reduce parasitic capacitance. By selecting materials with different dielectric constants for different regions, the patent optimizes the electrical characteristics. The use of a lower-k material in the region adjacent to the transistor directly addresses the parasitic capacitance issue while maintaining overall device performance.
2Ease of manufacture
If conventional fabrication processes are used for 10 nanometer node or sub-10 nanometer node, then manufacturing simplicity is maintained, but variability limits further extension into smaller nodes
Solution Approach 1:
The patent segments the dielectric structure into multiple regions with different materials. The first dielectric material is used in a first region and the second dielectric material with lower k-value is used in a second region adjacent to the transistor. This segmentation allows each region to be optimized independently, enabling precise control over parasitic capacitance while maintaining compatibility with conventional fabrication processes for smaller nodes.
Data Source
AI summary
Trench contact structures with etch stop layers, and methods of fabricating trench contact structures with etch-stop layers, are described. In an example, an integrated circuit structure includes a fin structure. An epitaxial source or drain structure is on the fin structure. An isolation structure is laterally adjacent to sides of the fin structure. A dielectric layer is on at least a portion of a top surface of the isolation structure and partially surrounds the epitaxial source or drain structure and leaves an exposed portion of the epitaxial source or drain structure. A conductive trench contact structure is on the exposed portion of the epitaxial source or drain structure. The conductive trench contact structure does not extend into the isolation structure.