Trench Density Buffer for CMP Uniformity in Organic EL Devices
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Solution Overview
Problem
In organic electroluminescent (EL) devices, the uneven polishing speed during chemical mechanical polishing (CMP) due to differences in trench densities between display and drive circuit regions leads to non-uniform transistor characteristics and luminance, causing display unevenness.
Innovation Solution
Incorporating a third region with a trench element isolation density matching the display region between the display and drive circuit regions to stabilize the polishing process and maintain uniformity, thereby reducing the influence of the drive circuit region on the display region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMP processing is performed on a silicon substrate with different trench densities in display and drive circuit regions, then the silicon oxide can be removed for planarization, but the polishing speed becomes non-uniform causing flatness degradation
Solution Approach 1:
The patent applies local quality by creating a buffer region with a specific trench density (third density) that differs from both the display region (first density) and drive circuit region (second density). This localized structural modification in the boundary area stabilizes the polishing speed transition zone, ensuring uniform CMP processing across the entire substrate while maintaining the necessary functional differences between display and drive circuit regions.
2Ease of operation
If transistors are arranged sparsely in the display region compared to the drive circuit region, then the display region achieves lower trench density, but this causes faster polishing speed and flatness degradation
Solution Approach 1:
The patent introduces a buffer region as an intermediary zone between the display region and drive circuit region. This buffer region acts as a transition zone with its own specific trench density that mediates the polishing speed difference between the sparse display region and dense drive circuit region, preventing flatness degradation while preserving the functional transistor arrangement differences.
3Productivity
If the silicon oxide area per unit area is small in the display region, then the polishing speed increases, but this creates luminance unevenness in the organic EL device
Solution Approach 1:
The patent applies parameter changes by modifying the trench density parameter in the buffer region to a third density that is different from the first density in the display region and second density in the drive circuit region. This parameter adjustment in the boundary area stabilizes the polishing speed, ensuring uniform removal of silicon oxide and preventing luminance unevenness in the final organic EL device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of transistor characteristics and luminance across the organic EL device, preventing display unevenness and improving overall display quality.
Implementation Method 1
the silicon oxide is subjected to planarization processing by chemical mechanical polishing (hereinafter referred to as CMP)
Data Source
AI summary
A display region E that includes an element isolation region 88 having a display region trench density D1, and in which a pixel circuit 110 including a transistor is arranged; a drive circuit region 105 that includes a region in which a drive circuit element isolation portion having a drive circuit region trench density D2 is provided, and in which drive circuits 101 and 102 that supply signals for driving the pixel circuit 110 are arranged; and a peripheral region 106 that includes region in which a peripheral element isolation portion having a peripheral region trench density D3 is provided, and is arranged at least between the display region E and the drive circuit region 105. The display region trench density D1 is different from the drive circuit region trench density D2, and the display region trench density D1 is equal to the peripheral region trench density D3.