Trench Drift Region Layout for High-Voltage LDMOS Area Reduction
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Solution Overview
Problem
Existing LDMOS and EDMOS semiconductor devices face challenges in reducing on-resistance while maintaining high withstand voltage, as the size of the drift region is limited by the physical constraints of silicon withstand voltage.
Innovation Solution
The semiconductor device incorporates a trench formed in the drift region and a drain region formed at the bottom of the trench, which lengthens the drift region longitudinally, thereby improving withstand voltage while reducing the device area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the drift region size is reduced to minimize on-resistance, then the device area is reduced, but the withstand voltage capability deteriorates due to the physical limit of silicon withstand voltage
Solution Approach 1:
The patent transitions the drift region from a planar two-dimensional structure to a three-dimensional structure by forming a trench in the drift region and placing the drain region at the bottom of the trench. This vertical extension into the third dimension allows the drift region to achieve longer effective length for withstanding higher voltages while maintaining a smaller footprint area on the semiconductor substrate surface.
Solution Approach 2:
The drain region is nested within the trench structure that is formed in the drift region. This nested configuration allows the drain region to be positioned vertically below the drift region, effectively utilizing the vertical space within the trench to extend the drift region length without increasing the lateral device area.
2Reliability
If the drift region length is increased to improve withstand voltage, then the breakdown voltage capability is improved, but the device area increases
Solution Approach 1:
The patent resolves this contradiction by extending the drift region vertically into the trench rather than horizontally across the substrate surface. The trench structure provides a vertical pathway that increases the effective drift region length for voltage withstanding while confining the lateral spread, thus achieving longer drift length without proportional increase in device area.
Solution Approach 2:
The trench structure acts as a confined space that guides and shapes the drift region extension. By forming the drain region at the bottom of the trench, the structure provides a defined vertical pathway that allows the drift region to extend downward in a controlled manner, maximizing the use of vertical space to achieve longer effective length without lateral expansion.
3Ease of manufacture
If a traditional planar drift region structure is used, then the manufacturing process is simple, but the device cannot achieve both high withstand voltage and small area simultaneously
Solution Approach 1:
The patent segments the drift region into two distinct parts: the upper drift region formed in the semiconductor substrate and the lower drain region formed at the bottom of the trench. This segmentation allows each region to be optimized independently - the upper drift region handles voltage withstanding while the lower drain region provides electrical connection, achieving high withstand voltage capability through a structured approach that builds upon standard semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the withstand voltage of the semiconductor device while minimizing its area, addressing the limitations of traditional drift region sizes.
Implementation Method 1
a gate structure formed on the semiconductor substrate, a part of the gate structure covering a part of the first drift region
Implementation Method 2
performing ion implantation to form a drain region in the semiconductor substrate at a bottom of the first trench
Data Source
AI summary
A semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a semiconductor substrate. A first drift region is formed in the semiconductor substrate. A gate structure is formed on the semiconductor substrate A part of the gate structure covers a part of the first drift region. A first trench is formed in the first drift region, and a drain region is formed in the semiconductor substrate at the bottom of the first trench.