Trench Electrode Electric Field Relaxation for ESD Tolerance
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Solution Overview
Problem
Semiconductor devices with trench structures face issues with high electric field concentration at the lower end of the upper electrode, leading to insulating film destruction and reduced Electrostatic Discharge (ESD) tolerance.
Innovation Solution
Incorporating an electric field relaxation portion between the side surface of the trench and the lower end of the upper electrode, using a thicker insulating film integral to both the thick and thin film portions of the first insulating film, which is also present between the upper and lower electrodes, to mitigate electric field concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a trench structure with upper and lower electrodes is used, then device integration is achieved, but high electric field concentrates at the lower end of the upper electrode destroying the insulating film and reducing ESD tolerance
Solution Approach 1:
The patent applies local quality by creating a thick film portion of the insulating layer specifically at the lower end of the upper electrode where electric field concentration occurs. This localized thickening (from 50-100nm to 200-500nm) provides enhanced insulation precisely where needed without affecting other regions of the device, thereby resolving the contradiction between maintaining trench structure integration and improving ESD tolerance.
Solution Approach 2:
The patent implements preliminary action by forming the thick film portion of the insulating layer before final electrode deposition. This advance preparation ensures that the insulating film is already in place to prevent electric field-induced damage before the electrodes are fully formed and operational, thus preventing insulating film destruction and improving ESD tolerance from the outset.
2Ease of manufacture
If no electric field relaxation measures are taken, then manufacturing process is simple, but electric field concentration destroys insulating film and lowers ESD tolerance
Solution Approach 1:
The patent merges the formation of the thick film portion with the existing insulating layer deposition process. The thick film portion is created as an integrated part of the insulating layer formation sequence, combining multiple functions (insulation and electric field relaxation) into a single structural element, thereby improving ESD tolerance without significantly complicating the manufacturing process.
3Reliability
If insulating film thickness is increased to prevent breakdown, then ESD tolerance improves, but device dimensions and complexity increase
Solution Approach 1:
The patent applies local quality by creating a thick film portion of the insulating layer specifically at the lower end of the upper electrode where electric field concentration occurs. This localized thickening (from 50-100nm to 200-500nm) provides enhanced insulation precisely where needed without affecting other regions of the device, thereby resolving the contradiction between maintaining trench structure integration and improving ESD tolerance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively enhances ESD tolerance and suppresses electric field concentration, improving the semiconductor device's performance by reducing the risk of insulating film degradation and increasing ESD tolerance.
Implementation Method 1
an electric field relaxation portion that relaxes an electric field arising between the upper electrode and the semiconductor layer is provided between a side surface of the trench and a lower end portion of the upper electrode
Data Source
AI summary
A semiconductor device according to the present invention includes a semiconductor layer having a trench, a first insulating film formed along an inner surface of the trench, and an upper electrode and a lower electrode embedded in the trench via the first insulating film and disposed above and below a second insulating film. An electric field relaxation portion that relaxes an electric field arising between the upper electrode and the semiconductor layer is provided between a side surface of the trench and a lower end portion of the upper electrode.