Trench-Gate FET Doping Layout for Lower Feedback Capacitance
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Solution Overview
Problem
Existing field effect transistors face challenges in achieving high-speed switching due to high feedback capacitance, which is not effectively addressed by current manufacturing methods.
Innovation Solution
A method for producing field effect transistors involves forming a p-type trench underlayer with controlled impurity concentration, separate from the body layer, to reduce feedback capacitance and enhance switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a p-type trench underlayer is formed with high p-type impurity concentration, then feedback capacitance is reduced and switching speed is improved, but manufacturing complexity increases due to separate ion implantation steps
Solution Approach 1:
The manufacturing process is segmented into separate ion implantation steps: one for forming the body layer and another for forming the p-type trench underlayer. This segmentation allows independent control of impurity concentrations in different regions, enabling the p-type trench underlayer to have high impurity concentration for low feedback capacitance while the body layer maintains appropriate characteristics for breakdown voltage.
Solution Approach 2:
The p-type trench underlayer is formed with locally high p-type impurity concentration specifically in the trench bottom region, while the body layer maintains its own optimized impurity concentration. This local quality differentiation allows the trench underlayer to minimize feedback capacitance without compromising the overall device performance.
2Manufacturing precision
If the p-type trench underlayer is formed with high impurity concentration, then feedback capacitance is reduced, but control precision over impurity distribution becomes more difficult
Solution Approach 1:
The body layer is formed first with controlled p-type impurity concentration, establishing a baseline structure. Subsequently, the p-type trench underlayer is formed through another ion implantation step that adds high concentration p-type impurities specifically in the trench bottom region. This preliminary action sequence enables precise control over the spatial distribution and concentration of impurities in each layer.
3Manufacturing precision
If separate ion implantation steps are used for body layer and p-type trench underlayer, then independent impurity concentration control is achieved, but production time increases
Solution Approach 1:
The ion implantation steps for forming the body layer and the p-type trench underlayer are performed in sequence using the same ion implantation equipment and similar process conditions. While these are separate steps, they are merged in terms of process methodology and equipment usage, allowing efficient execution without requiring entirely different process lines, thus minimizing the impact on production efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces feedback capacitance and on-resistance, enabling high-speed operation and improved breakdown voltage in the field effect transistor.
Implementation Method 1
a p-type body layer is formed in contact with the p-type deep layers and the n-type deep layers from the upper side by ion-implanting a p-type impurity into the semiconductor substrate
Implementation Method 2
the p-type impurity concentration in the p-type trench underlayer can be controlled independently of the p-type impurity concentration in the body layer... the p-type impurity is implanted at a higher concentration than in the body layer formation step. Therefore, when a voltage is applied to a field effect transistor manufactured by this producing method, the p-type trench underlayer is unlikely to be depleted. Therefore, the feedback capacitance of the field effect transistor can be effectively reduced.
Data Source
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AI summary
A p-type impurity concentration in a p-type trench underlayer is appropriately adjusted. A method for producing a field effect transistor includes: a body layer formation step of forming a p-type body layer by ion-implanting a p-type impurity; a trench formation step of forming a trench in an upper surface of a semiconductor substrate; a p-type trench underlayer formation step of forming the p-type trench underlayer below the trench by implanting a p-type impurity into a bottom surface of the trench while the upper surface of the semiconductor substrate is covered with an ion implantation mask; and a gate electrode formation step of forming a gate insulating film and a gate electrode in the trench. In the p-type trench underlayer formation step, the p-type impurity is implanted at a higher concentration than in the body layer formation step.