Trench Field Plate Insulation Layout for Charge Trap Suppression

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Solution Overview

Problem

Existing semiconductor devices with a field plate electrode inside a trench and a gate electrode on an insulating layer face challenges in maintaining high breakdown voltage and reliability due to charge traps at the trench bottom, which degrade device characteristics over time.

Innovation Solution

A manufacturing method involving the formation of a silicon nitride film on the field plate electrode and mesa part, followed by selective removal of silicon oxide films using chemical mechanical polishing (CMP) to suppress charge traps, ensuring a controlled thickness of silicon oxide films and absence of silicon nitride at the trench bottom, thereby enhancing breakdown voltage and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field plate electrode is located inside a trench with a gate electrode on the field plate electrode with an insulating layer interposed, then the device structure is formed, but charge traps at the trench bottom degrade device characteristics over time

Engineering Contradiction:
Improvedevice characteristics stabilityVSAvoidcharge traps at trench bottom
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming a silicon nitride film on the trench bottom before forming the gate electrode. This preliminary film formation prevents charge trap generation at the trench bottom during subsequent processing and operation, thereby improving device characteristics stability over time without affecting the basic device structure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The silicon nitride film acts as an intermediary layer between the trench bottom and the gate electrode. This intermediary film suppresses charge trap formation and prevents direct interaction between the trench bottom and electric fields, thereby protecting device characteristics from degradation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If silicon oxide films are formed on the field plate electrode and mesa part, then insulation is provided, but excessive silicon oxide at the trench bottom causes reliability issues

Engineering Contradiction:
Improvebreakdown voltageVSAvoidexcessive silicon oxide at trench bottom
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selectively removing silicon oxide from the trench bottom area while maintaining silicon oxide films in other regions. Chemical mechanical polishing is used to locally reduce silicon oxide thickness at the trench bottom, preventing reliability issues while preserving insulation properties in areas where silicon oxide is needed

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses partial action by selectively removing only the excessive silicon oxide at the trench bottom through chemical mechanical polishing, rather than removing all silicon oxide films. This partial removal maintains necessary insulation while eliminating the harmful excessive accumulation that causes reliability issues

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively prevents degradation of breakdown voltage and reliability issues by minimizing charge traps, ensuring stable device performance over time.

Implementation Method 1

exposing the silicon nitride film on the mesa part by removing the silicon oxide film on the mesa part by chemical mechanical polishing

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 2

forming a silicon oxide film by chemical vapor deposition inside the trench and on the mesa part after the forming of the silicon nitride film

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS20250324660A1Method for manufacturing semiconductor device and semiconductor device
Publication Date: 2025.10.16 KK TOSHIBA
  • US20250324660A1 patent drawing
  • US20250324660A1 patent drawing
  • US20250324660A1 patent drawing

AI summary

A method for manufacturing a semiconductor device includes forming a trench and a mesa part in a semiconductor layer; forming a field plate electrode inside the trench with a field insulating film interposed; forming a silicon nitride film on the field plate electrode, on the mesa part, and on an upper sidewall of the mesa part adjacent to the trench above the field plate electrode; forming a silicon oxide film by chemical vapor deposition inside the trench and on the mesa part; exposing the silicon nitride film on the mesa part by removing the silicon oxide film on the mesa part by chemical mechanical polishing; removing the silicon nitride film on the upper sidewall of the mesa part and the silicon nitride film on the mesa part; and forming a gate electrode on the silicon oxide film inside the trench.